参数资料
型号: W25X32AVZPIG
厂商: WINBOND ELECTRONICS CORP
元件分类: PROM
英文描述: 4M X 8 FLASH 2.7V PROM, PDSO8
封装: 6 X 5 MM, GREEN, WSON-8
文件页数: 45/45页
文件大小: 1308K
代理商: W25X32AVZPIG
W25X32A
Publication Release Date: August 7, 2009
- 9 -
Preliminary - Revision B
9
FUNCTIONAL DESCRIPTION
9.1 SPI OPERATIONS
9.1.1
SPI Modes
The W25X32A is accessed through an SPI compatible bus consisting of four signals: Serial Clock (CLK),
Chip Select (/CS), Serial Data Input/Output (DIO) and Serial Data Output (DO). Both SPI bus operation
Modes 0 (0,0) and 3 (1,1) are supported. The primary difference between Mode 0 and Mode 3 concerns
the normal state of the CLK signal when the SPI bus master is in standby and data is not being
transferred to the Serial Flash. For Mode 0 the CLK signal is normally low. For Mode 3 the CLK signal is
normally high. In either case data input on the DIO pin is sampled on the rising edge of the CLK. Data on
the DO and DIO pins are clocked out on the falling edge of CLK.
9.1.2
Dual Output SPI
The W25X32A supports Dual output operation when using the "Fast Read with Dual Output" (3B hex)
instruction. This feature allows data to be transferred from the Serial Flash memory at twice the rate
possible with the standard SPI. This instruction is ideal for quickly downloading code from Flash to RAM
upon power-up (code-shadowing) or for applications that cache code-segments to RAM for execution.
The Dual output feature simply allows the SPI input pin to also serve as an output during this instruction.
All other operations use the standard SPI interface with single output signal.
9.1.3
Hold Function
The /HOLD signal allows the W25X32A operation to be paused while it is actively selected (when /CS is
low). The /HOLD function may be useful in cases where the SPI data and clock signals are shared with
other devices. For example, consider if the page buffer was only partially written when a priority interrupt
requires use of the SPI bus. In this case the /HOLD function can save the state of the instruction and the
data in the buffer so programming can resume where it left off once the bus is available again.
To initiate a /HOLD condition, the device must be selected with /CS low. A /HOLD condition will activate
on the falling edge of the /HOLD signal if the CLK signal is already low. If the CLK is not already low the
/HOLD condition will activate after the next falling edge of CLK. The /HOLD condition will terminate on the
rising edge of the /HOLD signal if the CLK signal is already low. If the CLK is not already low the /HOLD
condition will terminate after the next falling edge of CLK.
During a /HOLD condition, the Serial Data Output (DO) is high impedance, and Serial Data Input/Output
(DIO) and Serial Clock (CLK) are ignored. The Chip Select (/CS) signal should be kept active (low) for the
full duration of the /HOLD operation to avoid resetting the internal logic state of the device.
相关PDF资料
PDF描述
W25X32AVSFIG 4M X 8 FLASH 2.7V PROM, PDSO16
W26L04AJ-12I 256K X 16 STANDARD SRAM, 12 ns, PDSO44
W26L04AH-10 256K X 16 STANDARD SRAM, 10 ns, PDSO44
W28A CERPAC, 28 LEAD
W2H11A1018AT 1 FUNCTIONS, 100 V, 0.5 A, FEED THROUGH CAPACITOR
相关代理商/技术参数
参数描述
W25X32BV 制造商:WINBOND 制造商全称:Winbond 功能描述:32M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI
W25X32BVSFIG 制造商:WINBOND 制造商全称:Winbond 功能描述:32M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI
W25X32BVSSIG 制造商:WINBOND 制造商全称:Winbond 功能描述:32M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI
W25X32BVZEIG 制造商:WINBOND 制造商全称:Winbond 功能描述:32M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI
W25X32BVZPIG 制造商:WINBOND 制造商全称:Winbond 功能描述:32M-BIT SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI