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参数资料
| 型号： | W27E02 |
| 英文描述： | EPROM |
| 中文描述： | 存储器 |
| 文件页数： | 2/15页 |
| 文件大小： | 257K |
| 代理商： | W27E02 |
Preliminary W27E01
- 2 -
6. FUNCTIONAL DESCRIPTION
Read Mode
Like conventional UVEPROMs, the W27E01 has two control functions and both of these produce data at
the outputs.
#CE is for power control and chip select. #OE controls the output buffer to gate data to the output pins.
When addresses are stable, the address access time (T
ACC
) is equal to the delay from #CE to output
(T
CE
), and data are available at the outputs T
OE
after the falling edge of #OE, if T
ACC
and T
CE
timings
are met.
Erase Mode
The erase operation is the only way to change data from "0" to "1." Unlike conventional UVEPROMs,
which use ultraviolet light to erase the contents of the entire chip (a procedure that requires up to half an
hour), the W27E01 uses electrical erasure. Generally, the chip can be erased within 100 mS by using an
EPROM writer with a special erase algorithm.
Erase mode is entered when V
PP
is raised to V
PE
(12V), V
DD
= V
CE
(5V), #CE low, #OE high, A9 = V
HH
(12V), A0 low
,
and all other address pins low and data input pins high. Pulsing #PGM low starts the
erase operation.
Erase Verify Mode
After an erase operation, all of the bytes in the chip must be verified to check whether they have been
successfully erased to "1" or not. The erase verify mode automatically ensures a substantial erase
margin. This mode will be entered after the erase operation if V
DD
= V
PE
(5V), #CE low, and #OE low,
#PGM
high
.
Program Mode
Programming is performed exactly as it is in conventional UVEPROMs, and programming is the only
way to change cell data from "1" to "0." The program mode is entered when V
PP
is raised to V
PP
(12V),
V
DD
= V
CP
(5V), #CE low, #OE high, the address pins equal the desired addresses, and the input pins
equal the desired inputs. Pulsing #PGM low starts the programming operation.
Program Verify Mode
All of the bytes in the chip must be verified to check whether they have been successfully programmed
with the desired data or not. Hence, after each byte is programmed, a program verify operation should
be performed. The program verify mode automatically ensures a substantial program margin. This mode
will be entered after the program operation if V
PP
= V
PP
(12V), #CE low, #OE low
,
and #PGM high.
Erase/Program Inhibit
Erase or program inhibit mode allows parallel erasing or programming of multiple chips with different
data. When #CE high , erasing or programming of non-target chips is inhibited, so that except for the
#CE, the W27E01 may have common inputs.
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相关代理商/技术参数 |
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| W27E020 | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 ELECTRICALLY ERASABLE EPROM |
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| W27E020P-12 | 制造商:WINBOND 制造商全称:Winbond 功能描述:256K X 8 ELECTRICALLY ERASABLE EPROM |
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