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参数资料
| 型号： | W28J321 |
| 英文描述： | FLASH |
| 中文描述： | 闪光 |
| 文件页数： | 14/48页 |
| 文件大小： | 416K |
| 代理商： | W28J321 |
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W28J320B/T
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device (Permanent Lock) or block within the device (Block Lock) to be locked. The Clear Block Lock-
Bits command requires the command and address within the device.
The CUI does not occupy an addressable memory location. A write occurs when #WE and #CE are
active (low). The address and data needed to execute a command are latched on the rising edge of
#WE or #CE, whichever occurs first. Standard microprocessor write timings are used.
Figures 18 and 19 illustrate #WE and #CE controlled write operations.
9. COMMAND DEFINITIONS
When V
PP
≤
V
PPLK
, read operations from the status register, identifier codes, or blocks are enabled.
Setting V
PPH1/2
= V
PP
enables successful block erase, full chip erase, word/byte write and lock-bit
configuration operations.
Device operations are selected by writing specific commands into the CUI. Table 3 defines these
commands.
Table 2.1. Bus Operations (#BYTE =
V
IH
) (note 1, 2)
MODE
#RESET
#CE
#OE
#WE
ADDRESS
V
PP
X
DQ0
15
RY/#BY(3)
Read (note 8)
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IH
X
V
IL
V
IH
X
V
IH
V
IH
X
X
DOUT
X
Output Disable
X
X
High Z
X
Standby
X
X
High Z
X
Reset (note 4)
X
X
X
X
High Z
High Z
Read Identifier Codes
(note 8)
V
IH
V
IL
V
IL
V
IH
See
Figure 4, 5
X
Note 5
High Z
Write (note 6, 7, 8)
V
IH
V
IL
V
IH
V
IL
X
X
DIN
X
Table 2.2. Bus Operations (#BYTE =
V
IL
) (note 1, 2)
MODE
#RESET
#CE
#OE
#WE
ADDRESS
V
PP
X
DQ0
15 RY/#BY(3)
Read (note 8)
V
IH
V
IH
V
IH
V
IL
V
IL
V
IL
V
IH
X
V
IL
V
IH
X
V
IH
V
IH
X
X
DOUT
X
Output Disable
X
X
High Z
X
Standby
X
X
High Z
X
Reset (note 4)
X
X
X
X
High Z
High Z
Read Identifier Codes
(note 8)
V
IH
V
IL
V
IL
V
IH
See
Figure 4,5
X
Note 5
High Z
Write (note 6, 7, 8)
V
IH
V
IL
V
IH
V
IL
X
X
DIN
X
Notes:
1. Refer to DC Characteristics. When V
PP
≤
V
PPLK
, memory contents can be read, but not altered.
2. X can be V
IL
or V
IH
for control pins and addresses, and V
PPLK
or V
PPH1/2
for V
PP
. See DC Characteristics for V
PPLK
voltages.
3. RY/#BY is V
OL
when the WSM is executing internal block erase, full chip erase, word/byte write or lock-bit configuration
algorithms. It is High Z during when the WSM is not busy, in block erase suspend mode (with word/byte write inactive),
word/byte write suspend mode or reset mode.
4. #RESET at V
SS
±
0.2V ensures the lowest power consumption.
5. See Read Identifier Codes Command section for details.
6. Command writes involving block erase, full chip erase, word/byte write or lock-bit configuration are reliably executed when V
PP
= V
PPH1/2
and V
DD
= 2.7V to 3.6V.
7. Refer to Table 3 for valid DIN during a write operation.
8. Never hold #OE low and #WE low at the same timing.
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