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参数资料
| 型号： | W28J800BT90L |
| 元件分类： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件页数： | 13/51页 |
| 文件大小： | 1468K |
| 代理商： | W28J800BT90L |
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W28J800B/T
The OTP block is read in Configuration Read Mode by writing Read Identifier Codes command(90H).
To return to Read Array Mode, write Read Array command(FFH).
The OTP block is programmed by writing OTP Program command(C0H). First write OTP Program
command and then write data with address to the device (See Figure 5). If OTP program is failed,
SR.4(WORD/BYTE WRITE AND SET LOCK-BIT STATUS) bit is set to "1". And if this OTP block is
locked, SR.1(DEVICE PROTECT STATUS) bit is set to "1" too.
The OTP block is also locked by writing OTP Program command(C0H). First write OTP Program
command and then write data "FFFDH" with address "80H" to the device. Address "80H" of OTP block
is OTP lock information. Bit 0 of address "80H" means factory program area lock status("1" is "NOT
LOCKED", "0" is "LOCKED"). Bit 1 of address "80H" means customer program area lock status. The
OTP lock information can not be cleared, after once it is set.
Customer Program Area
Factory Program Area
OTP Lock
[A18-A0]
[A18-A1]
01FFF
00FFF
00085
00084
00081
00080
0010A
00109
00102
00100
Customer Program Area Lock(Bit 1)
Factory Program Area Lock(Bit 1)
Figure 5. OTP Block Address Map
Write
Writing commands to the CUI enable reading of device data and identifier codes. They also control
inspection and clearing of the status register. When V
DD
= 2.7V to 3.6V and V
PP
= V
PPH1/2
, the CUI
additionally controls block erase, full chip erase, word/byte write and lock-bit configuration.
The Block Erase command requires appropriate command data and an address within the block to be
erased. The Full Chip Erase command requires appropriate command data and an address within the
device. The Word/Byte Write command requires the command and address of the location to be
written. Set Permanent and Block Lock-Bit commands require the command and address within the
device (Permanent Lock) or block within the device (Block Lock) to be locked. The Clear Block Lock-
Bits command requires the command and address within the device.
The CUI does not occupy an addressable memory location. A write occurs when #WE and #CE are
active (low). The address and data needed to execute a command are latched on the rising edge of
#WE or #CE, whichever occurs first. Standard microprocessor write timings are used.
Figures 18 and 19 illustrate #WE and #CE controlled write operations.
Publication Release Date: October 31, 2002
- 13 -
Revision A3
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