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参数资料
| 型号： | W3041BCL |
| 元件分类： | 通信及网络 |
| 英文描述： | SPECIALTY TELECOM CIRCUIT, PDSO20 |
| 封装： | TSSOP-20 |
| 文件页数： | 10/12页 |
| 文件大小： | 822K |
| 代理商： | W3041BCL |
Preliminary Data Sheet
W3041
December 1998
IF Receiver with Integrated IF2 Bandpass Filters
Lucent Technologies Inc.
7
Enabling the Power Supply (No Direct Logic to Pin 20)
If the W3041 application provides logic control of the voltage regulator instead of the W3041 directly, certain
precautions must be taken. This is accomplished by connecting a resistor from the positive power supply (pin 1 =
VCC1, pin 6 = VDDFI, and pin 11 = VCC2) to ENBL (pin 20). It is necessary to make sure that the voltage on
ENBL
(pin 20) does not exceed 0.46 VCC until the voltage on the positive supply pins (pin 1 = VCC1, pin 6 = VDDFI, and
pin 11 = VCC2) is >2.5 Vdc. This requirement can be satisfied with an RC delay circuit requiring one resistor and
one capacitor.
To design the RC delay circuit, it is necessary to know:
+ Minimum stable voltage regulator output voltage VR
+ Time constant of the voltage regulator output
τR, usually established by the internal source resistance Rs and
external (or internal) regulator filter capacitance (Cs)
The W3041 integrated filter uses an automatic calibration routine that takes about 8 s typically (12 s max).
The calibration happens every time ENBL (pin 20) goes high. The calibration routine is initiated at the logic-high
threshold (minimum = 0.46 VCC, maximum = 0.7 VCC). For the calibration to proceed correctly, the power supply
voltage (VCC1 = VCC2 = VDDFI) must have risen to >2.5 Vdc.
Refer to the following circuit:
RE
1
6
11
20
W3041
C
BATTERY
VOLTAGE
REGULATOR
RS
CS
τ
R
+
–
τ
E
CE
Figure 4. Power Supply Diagram
The goal is to determine the Enable Time Constant
τ
E
, from which convenient values of RE and CE can be
chosen. The following equation may be used to calculate
τ
E
:
616
.
0
V
5
.
2
1
ln
R
E
τ
=
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