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参数资料
| 型号： | W3E64M72S-333SBM |
| 厂商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分类： | DRAM |
| 英文描述： | 64M X 72 DDR DRAM, 0.7 ns, PBGA219 |
| 封装： | 25 X 32 MM, PLASTIC, BGA-219 |
| 文件页数： | 2/19页 |
| 文件大小： | 496K |
| 代理商： | W3E64M72S-333SBM |
W3E64M72S-XSBX
10
White Electronic Designs Corporation (602) 437-1520 www.whiteedc.com
White Electronic Designs
September 2007
Rev. 3
White Electronic Designs Corp. reserves the right to change products or specications without notice.
NOTES:
1.
CKE is HIGH for all commands shown except SELF REFRESH.
2.
A0-12 dene the op-code to be written to the selected Mode Register. BA0, BA1
select either the mode register (0, 0) or the extended mode register (1, 0).
3.
A0-12 provide row address, and BA0, BA1 provide bank address.
4.
A0-9 provide column address; A10 HIGH enables the auto precharge feature (non
persistent), while A10 LOW disables the auto precharge feature; BA0, BA1 provide
bank address.
5.
A10 LOW: BA0, BA1 determine the bank being precharged. A10 HIGH: All banks
precharged and BA0, BA1 are “Don’t Care.”
TRUTH TABLE – COMMANDS (NOTE 1)
NAME (FUNCTION)
CS#
RAS#
CAS#
WE#
ADDR
DESELECT (NOP) (9)
H
X
NO OPERATION (NOP) (9)
L
H
X
ACTIVE (Select bank and activate row) ( 3)
L
H
Bank/Row
READ (Select bank and column, and start READ burst) (4)
L
H
L
H
Bank/Col
WRITE (Select bank and column, and start WRITE burst) (4)
L
H
L
Bank/Col
BURST TERMINATE (8)
L
H
L
X
PRECHARGE (Deactivate row in bank or banks) ( 5)
L
H
L
Code
AUTO REFRESH or SELF REFRESH (Enterselfrefreshmode) (6, 7)
L
H
X
LOAD MODE REGISTER (2)
L
Op-Code
TRUTH TABLE – DM OPERATION
NAME (FUNCTION)
DM
DQs
WRITE ENABLE (10)
L
Valid
WRITE INHIBIT (10)
H
X
6.
This command is AUTO REFRESH if CKE is HIGH; SELF REFRESH if CKE is
LOW.
7.
Internal refresh counter controls row addressing; all inputs and I/Os are “Don’t
Care” except for CKE.
8.
Applies only to read bursts with auto precharge disabled; this command is
undened (and should not be used) for READ bursts with auto precharge enabled
and for WRITE bursts.
9.
DESELECT and NOP are functionally interchangeable.
10. Used to mask write data; provided coincident with the corresponding data.
相关PDF资料 |
PDF描述 |
|---|---|
| W3E64M72S-200SBC | 64M X 72 DDR DRAM, 0.8 ns, PBGA219 |
| W3E64M72S-333SBC | 64M X 72 DDR DRAM, 0.7 ns, PBGA219 |
| W3E64M72S-266SBM | 64M X 72 DDR DRAM, 0.75 ns, PBGA219 |
| W3E64M72S-333BC | 64M X 72 SYNCHRONOUS DRAM, 0.7 ns, PBGA219 |
| W3E64M72S-250BM | 64M X 72 SYNCHRONOUS DRAM, 0.8 ns, PBGA219 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W3E64M72S-XBX | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:64Mx72 DDR SDRAM |
| W3EG128M72ETSU202AJD3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
| W3EG128M72ETSU202D3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
| W3EG128M72ETSU202JD3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
| W3EG128M72ETSU262AJD3 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:1GB - 128Mx72 DDR SDRAM UNBUFFERED ECC w/PLL |
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