参数资料
型号: W3H64M72E-ESM
厂商: WHITE ELECTRONIC DESIGNS CORP
元件分类: DRAM
英文描述: 64M X 72 DDR DRAM, PBGA208
封装: 17 X 23 MM, 1 MM PITCH, PLASTIC, BGA-208
文件页数: 15/30页
文件大小: 999K
代理商: W3H64M72E-ESM
W3H64M72E-XSBX
22
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
December 2006
Rev. 2
ADVANCED*
White Electronic Designs Corp. reserves the right to change products or specications without notice.
DC OPERATING CONDITIONS
All voltages referenced to VSS
Parameter
Symbol
Min
Typical
Max
Unit
Notes
Supply voltage
VCC
1 .7
1 .8
1 .9
V
1
I/O Supply voltage
VCCQ
1 .7
1 .8
1 .9
V
4
I/O Reference voltage
VREF
0.49 x VCCQ
0.50 x VCCQ
0.51 x VCCQ
V2
I/O Termination voltage
VTT
VREF-0.04
VREF
VREF + 0.04
V
3
Notes:
1.
VCC VCCQ must track each other. VCCQ must be less than or equal to VCC.
2.
VREF is expected to equal VCCQ/2 of the transmitting device and to track variations in the DC level of the same. Peak-to-peak noise on VREF may not exceed ±1 percent of the DC
value. Peak-to-peak AC noise on VREF may not exceed ±2 percent of VREF. This measurement is to be taken at the nearest VREF bypass capacitor.
3.
VTT is not applied directly to the device. VTT is a system supply for signal termination resistors, is expected to be set equal to VREF and must track variations in the DC level of VREF.
4.
VCCQ tracks with VCC track with VCC.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
MIN
MAX
U nit
VCC
Voltage on VCC pin relative to VSS
-1.0
2.3
V
VCCQ
Voltage on VCCQ pin relative to VSS
-0.5
2.3
V
VIN, VOUT
Voltage on any pin relative to VSS
-0.5
2.3
V
TSTG
Storage temperature
-55
125
°C
IL
Input leakage current; Any input 0V<VIN<VCC; VREF input
0V<VIN<0.95V; Other pins not under test = 0V
Command/Address,
RAS#, CAS#, WE#,
CS#, CKE
-25
25
A
CK, CK#
-10
10
A
DM
-5
5
A
IOZ
Output leakage current;
0V<VOUT<VCCQ; DQs and ODT are disable
DQ, DQS, DQS#
-5
5
A
IVREF
VREF leakage current; VREF = Valid VREF level
-10
10
A
INPUT/OUTPUT CAPACITANCE
TA = 25°C, f = 1MHz, VCC = VCCQ = 1.8V
Parameter
Symbol
Max
Unit
Input capacitance (A0 - A12, BA0 - BA2 ,CS#, RAS#,CAS#,WE#, CKE, ODT)
CIN1
TBD
pF
Input capacitance CK, CK#
CIN2
TBD
pF
Input capacitance DM, DQS, DQS#
CIN3
TBD
pF
Input capacitance DQ0 - 71
COUT
TBD
pF
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