参数资料
型号: W78E858A40PL
厂商: Nuvoton Technology Corporation of America
文件页数: 33/35页
文件大小: 0K
描述: IC MCU 8-BIT 32K FLASH 44-PLCC
标准包装: 30
系列: W78
核心处理器: 8052
芯体尺寸: 8-位
速度: 40MHz
连通性: EBI/EMI,串行端口
外围设备: POR,PWM,WDT
输入/输出数: 36
程序存储器容量: 32KB(32K x 8)
程序存储器类型: 闪存
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 4.5 V ~ 5.5 V
振荡器型: 内部
工作温度: 0°C ~ 70°C
封装/外壳: 44-PLCC
包装: 管件
W78E858
5.2.3
Software Protected Data Write
The EEPROM provides a JEDED-approved optional software-protected data write. Once this scheme
is enabled, any write operation requires a series of three-byte program commands (with specific data
to a specific address) to be performed before the data load operation. The three-byte load command
sequence begins the page load cycle, without which the write operation will not activated. This write
scheme provides optimal protection against inadvertent write cycles, such as cycles triggered by noise
during system power-up or power-down. Once enabled, the software data protection will remain
enabled unless the disable commands are issued. To reset the device to unprotected mode, a six-byte
command sequence is required.
The address mapping of the external memory is given as following, if ENAUXRAM or ENEEPROM
flags in CHPCON is not set, the CPU will access external memory instead of the on-chip memory. The
data, address and read/write strobe signal will appear on relative IO port just like standard 80C52.
5.2.4
Command Codes for Software Data Protection Enable/Disable and Software Erase
BYTE
ENABLE WRITE PROTECT
DISABLE WRITE PROTECT
SOFTWARE ERASE
SEQUENCE
ADDRESS
DATA
ADDRESS
DATA
ADDRESS
DATA
0 Write
FFD5H
AAH
FFD5H
AAH
FFD5H
AAH
1 Write
FFAAH
55H
FFAAH
55H
FFAAH
55H
2 Write
FFD5H
A0H
FFD5H
80H
FFD5H
80H
3 Write
-
FFD5H
AAH
FFD5H
AAH
4 Write
-
FFAAH
55H
FFAAH
55H
5 Write
-
FFD5H
20H
FFD5H
10H
Auiliary RAM 512 Bytes
0000H
01FFH
0200H
EEPRO M 128 Bytes
FF80H
FFFFH
External M em ory
Fig. On-Chip External Mem ory Addressed Mapping
(a) Standard 51 Series
Publication Release Date: April 22, 2008
- 7 -
Revision A8
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