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参数资料
| 型号： | W91030BSG |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | 无绳电话/电话 |
| 英文描述： | TELEPHONE CALLING NO IDENT CKT, PDSO24 |
| 封装： | 300MIL, ROHS COMPLIANT, PLASTIC, SOP-24 |
| 文件页数： | 27/32页 |
| 文件大小： | 245K |
| 代理商： | W91030BSG |
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W91030B
Publication Release Date: Sep. 27, 2005
- 4 -
Revision A2
Pin Descriptions, continued
PIN
NAME
TYPE
DESCRIPTION
11
OSCO
O
Oscillator Output. A 3.579545 MHz crystal or ceramic resonator should be
connected between this pin and the OSCI pin. Should left open or to drive
another clocked device when an external clock is connected to the OSCI
pin.
12
VSS
I
Power Supply Ground.
13
TEST
I
Test pin. Must be connected to VSS for normal operation.
14
SLEEP/
RESET
I
Reset or Sleep Input (Schmitt input). When high the device will be reseted
and enter a low power state by disabling the gain control op-amp, the
oscillator and other internal circuits. The function of RNGDI, RNGRC and
the RNGON pins are not affected when the device is in a sleep condition.
This pin must be set low for normal operation. The device must reseted by
micro controller or by external RC pulse after power on.
15
FSKE
I
FSK Enable. Must be set high when for FSK demodulation. May be set low
to disable the FSK demodulator when FSK signal is not expected.
16
DCLK
I, O
Data Clock for the FSK interface. In the FSK data output interface mode 0
(MODE pin low), this pin is an output with a changing FSK frequency. In
the FSK interface mode 1, this pin is an input.
17
DATA
O
Data signal for the FSK interface. Serial data output according to the FSK
frequency input in FSK data output interface mode 0 (MODE pin low). Data
is shifted out on the rising edge of DCLK in FSK data output interface mode
1. Both logic 1 for mark and logic 0 for space.
18
FDRN
O
Data Ready of the FSK interface (Low active). In FSK interface mode 0
(MODE pin low), this pin identifies the 8-bit data boundary on the serial
output string. In FSK interface mode 1, this pin is used to notify the micro-
controller to extract the 8-bit data (ie. 8-bit data has been ready internally).
19
FCDN
O
FSK Carrier Detect (Low active). When low, it indicates the FSK signal has
been detected.
20
INTN
O
Interrupt signal (open drain). It is used to interrupt the microcontroller when
RNGON or FDRN are low, or if ALGO is high. Remains low until all three
signals have become inactive.
21
ALGO
O
Dual tone Alert signal Guard time detect Output. When high, a guard time
qualified for the dual tone alert signal has been detected.
22
ALGR
O
Dual tone Alert signal Guard time Resistor. Also functions as a dual tone
alert signal detect output without guard time. An external resistor must
connected between this pin and ALGRC to implement guard time
detection.
23
ALGRC
I
Dual tone Alert signal Guard time RC (CMOS output and internal voltage
comparator input). An external resistor must be connected between this pin
and ALGR and an external capacitor between this pin and VDD to
implement guard time detection.
24
VDD
I
Power supply input.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W91031 | 制造商:WINBOND 制造商全称:Winbond 功能描述:LOW POWER CMOS INTERGRATED CIRCUIT |
| W91031S | 制造商:WINBOND 制造商全称:Winbond 功能描述:Calling Line Identifier |
| W91031SG | 功能描述:IC CALL LINE IDENT 24-SOIC RoHS:是 类别:集成电路 (IC) >> 接口 - 电信 系列:- 产品培训模块:Lead (SnPb) Finish for COTS 产品变化通告:Product Discontinuation 06/Feb/2012 标准包装:750 系列:* |
| W91031SG (SA5825) TR | 制造商:Nuvoton Technology Corp 功能描述:FSK DECORDER WITH CALL ON WAIT |
| W91031SG T&R | 制造商:Nuvoton Technology Corp 功能描述:IC CALL LINE IDENT 24-SOIC |
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