参数资料
型号: W981616CH-5
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 1M X 16 SYNCHRONOUS DRAM, 5.5 ns, PDSO50
封装: 0.400 INCH, TSOP2-50
文件页数: 4/43页
文件大小: 1151K
代理商: W981616CH-5
W981616CH
- 12 -
8. TABLE OF OPERATING MODES
Fully synchronous operations are performed to latch the commands at the positive edges of CLK.
Table 1 shows the truth table for the operation commands.
Table 1 Truth Table (note 1, 2)
COMMAND
DEVICE
STATE
CKEN-1 CKEN DQM BA A10 A9-0 CS RAS CAS WE
Bank Active
Idle
H
X
V
L
H
Bank Precharge
Any
H
X
V
L
X
L
H
L
Precharge All
Any
H
X
H
X
L
H
L
Write
Active (3)
H
X
V
L
V
L
H
L
Write with Autoprecharge Active (3)
H
X
V
H
V
L
H
L
Read
Active (3)
H
X
V
L
V
L
H
L
H
Read with Autoprecharge Active (3)
H
X
V
H
V
L
H
L
H
Mode Register Set
Idle
H
X
V
L
No-Operation
Any
H
X
L
H
Burst Stop
Active (4)
H
X
L
H
L
Device Deselect
Any
H
X
H
X
Auto-Refresh
Idle
H
X
L
H
Self-Refresh Entry
Idle
H
L
X
L
H
Self-Refresh Exit
Idle
(S.R)
L
H
X
H
L
X
H
X
H
X
Clock Suspend Mode
Entry
Active
H
L
X
Power Down Mode Entry
Idle
Active (5)
H
L
X
H
L
X
H
X
H
X
Clock Suspend Mode
Exit
Active
L
H
X
Power Down Mode Exit
Any
(Power
down)
L
H
X
H
L
X
H
X
H
X
Data Write/Output
Enable
Active
H
X
L
X
Data Write/Output
Disable
Active
H
X
H
X
Notes:
(1) V = Valid, X = Don't care, L = Low Level, H = High Level
(2) CKEn signal is input level when commands are provided.
(3) These are state of bank designated by BA signals.
(4) Device state is full page burst operation.
(5) Power Down Mode can not be entered in the burst cycle.
When this command asserts in the burst cycle, device state is clock suspend mode.
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