参数资料
型号: WBLXT9785HC.D0
厂商: CORTINA SYSTEMS INC
元件分类: 网络接口
英文描述: DATACOM, INTERFACE CIRCUIT, PQFP208
封装: ROHS COMPLIANT, PLASTIC, HQFP -208
文件页数: 56/222页
文件大小: 3158K
代理商: WBLXT9785HC.D0
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页当前第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页第127页第128页第129页第130页第131页第132页第133页第134页第135页第136页第137页第138页第139页第140页第141页第142页第143页第144页第145页第146页第147页第148页第149页第150页第151页第152页第153页第154页第155页第156页第157页第158页第159页第160页第161页第162页第163页第164页第165页第166页第167页第168页第169页第170页第171页第172页第173页第174页第175页第176页第177页第178页第179页第180页第181页第182页第183页第184页第185页第186页第187页第188页第189页第190页第191页第192页第193页第194页第195页第196页第197页第198页第199页第200页第201页第202页第203页第204页第205页第206页第207页第208页第209页第210页第211页第212页第213页第214页第215页第216页第217页第218页第219页第220页第221页第222页
Page 149
Cortina Systems LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
4.11 DTE Discovery Process
negotiation mode was used to establish link with the phone, and the DTE process is
still enabled. The LXT9785E restarts negotiation without DTE detection if either forced
speed mode is used to establish link with the phone, or the DTE process is disabled.
5. If power is applied and link is established, the system must still poll the Link Status
Register bit 1.2 for the corresponding LXT9785E port or the link status change
interrupt. This is required since link status is the only way to know when the Remote-
Power DTE is removed or unplugged. On seeing the Link_Down condition, the
processor instructs the power supply to switch off, and the DTE Discovery begins
again or is disabled.
4.11.3
Management Interface and Control
The management and control of the DTE discovery process is via the MDIO port. Each
port on the LXT9785E is capable of running the discovery process, thus each port is
independently controlled. This is achieved by each port having a dedicated set of control
and status bits. These bits are found in Register 27 as follows:
DTE DISCOVERY PROCESS ENABLE - Register Bit 27.6 (Dis_EN)
R/W Default value = 0: Disabled.
Register bit 27.6 controls the operation of the process. The discovery process is disabled
when Register bit 27.6 = 0, and enabled when Register bit 27.6 = 1. The MAC controller
sets Register bit 27.6 to a 1 when a port search for a DTE requiring power is desired.
Once set, Register bit 27.6 remains = 1 until the MAC clears it, either by directly clearing it
or by resetting the PHY. This allows the discovery process to continue to function if
unsuccessful in detecting a DTE, without being continually re-enabled by the MAC. If
Register bit 27.6 is set after link is established, no action is taken until after the link goes
down.
POWER ENABLE - Register Bit 27.4 (Power_EN)
R Default value = 0: No Remote-Power DTE found.
Register bit 27.4 contains the result of the discovery process. When Register bit 27.4 = 0,
the discovery process has not found Remote-Power DTE, and when Register bit 27.4 = 1,
the discovery process has potentially found a DTE requiring power. This indicates power
should be applied to the Category 5 cable. Register bit 27.4 is polled by the MAC during
the discovery process, and is cleared when the PHY is reset, when auto-negotiation is
restarted, or when auto-negotiation is disabled. In the event of a discovery process being
interrupted due to detection of an already powered link partner (auto-negotiation
completion or Parallel Detection), Register bit 27.4 = 0.
STANDARD LINK PARTNER DETECTED - Register Bit 27.3 (SLP_Det)
R/W Clear on Read Default value = 0: No link partner found.
When Register bit 27.3 = 1, a standard link partner has been detected by the LXT9785E
(NLPs, MLT3 data, FLPs without next page support, or FLPs with non-matching next
pages). This indicates power should not be applied to the Category 5 cable. When
Register bit 27.3 = 0, other bits are checked to determine overall status of the link partner.
Register bit 27.3 is cleared on read, or DTE discovery is disabled, link is established, or
auto-negotiation is either restarted or disabled.
LINK FAIL TIMEOUT - Register Bit 27.2 (LFIT Expired)
R/W Clear on Read Default value = 0 (Link Fail Inhibit timer has expired without
establishment of link with a standard link partner). Valid only when Standard Link Partner
Detected Register bit 27.3 = 1.
相关PDF资料
PDF描述
WBLXT9785HE.C2V DATACOM, INTERFACE CIRCUIT, PQFP208
WBLXT9785HE.D0-865114 DATACOM, INTERFACE CIRCUIT, PQFP208
WBLXT9785HE.D0-865115 DATACOM, INTERFACE CIRCUIT, PQFP208
WBLXT9785HE.D0 DATACOM, INTERFACE CIRCUIT, PQFP208
WBLXT9785EHCC2VSE000 DATACOM, INTERFACE CIRCUIT, PQFP208
相关代理商/技术参数
参数描述
WBLXT9785HE.D0-865114 制造商:Cortina Systems Inc 功能描述:PHY 8-CH 10Mbps/100Mbps 208-Pin PQFP
WBM-DATA 制造商:Thomas & Betts 功能描述:
WBM-DISHWASH 制造商:Thomas & Betts 功能描述:
WBM-DISPOSAL 制造商:Thomas & Betts 功能描述:
WBM-DUPLEX 制造商:Thomas & Betts 功能描述: