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| 型号： | WE905 |
| 厂商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 0.1 - 1GHx Single Chip FM Transceiver |
| 中文描述： | 0.1 - 1GHx单芯片FM收发器 |
| 文件页数： | 38/39页 |
| 文件大小： | 623K |
| 代理商： | WE905 |
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Winceiver WE904/WE905
WiNEDGE & WiRELESS
0.1 - 1GHz Single Chip FM Transceiver
2003 WiNEDGE & WiRELESS PTE LTD
Page 8
Rev Date: 2003 May 27
LPF2 (I/Q)
This second stage of the I/Q baseband low pass filter (LPF) section consists of active,
transconductance (gm) type filters. Combined with LPF1, these filters provide the required channel
selectivity by passing the entire desired frequency spectrum, while attenuating noise and adjacent
channel interference outside of the desired signal’s bandwidth.
DC Offset Correction
A proprietary DC offset correction circuit is used to control DC offset voltages. The use of DC offset
correction improves dynamic range, minimizes LO feed-through in the up-conversion mixer, and
reduces signal distortion. The correction circuit operates automatically and in a continuous mode.
Up-Conversion Quadrature Mixer
The zero-IF, complex, filtered baseband signal is translated by the quadrature up-conversion mixer to
an intermidiate frequency (IF). The resultant up-converted IF signal is low enough in frequency to
provide adequate SNR at the output of the period-to-digital FM demodulator, yet high enough to
satisfy signal sampling criterion.
IF BPF
The band pass filter, after the quadrature up-conversion mixer, passes the IF signal and rejects the
harmonic components of the up-conversion mixer's local oscillator. The IF band pass filter is
comprised of cascaded, active, transconductance filters with Butterworth response characteristics.
The lower corner frequency of the IF BPF is fix at 8kHz. The higher corner frequency of the filter is
determined by an external resistor connected to IFSET pin.
RSSI
The receive signal strength indication (RSSI) circuitry incorporates a log amplifier and detector for the
purpose of measuring the received RF carrier power level.
Period-to-Digital FM Demodulator
The Period-to-Digital (P/D) FM demodulator digitize the half-cycle period of the IF signal and convert
that information into the demodulated FM audio signal via a digital to analog converter.
The digitizing clock signal for the P/D is derived from the Rx VCO oscillator and the P/D divide ratio
(PDR). The PDR is programmable via serial interface.
TRANSMITTER
The transmitter section of the WE904/905 is comprised of a modulation input circuit, a PLL
synthesizer / VCO, and a RF power amplifier (PA) capable of providing +3.0 dBm into a 50 load. A
description of each major function block follows:
Transmit PLL Synthesizer and VCO
The transmit (Tx) on-chip PLL synthesizer is identical to the receive PLL synthesizer except that it
does not contain the fixed divide by 2 directly after the VCO. The transmit VCO frequency is therefore
identical with the transmitter local oscillator.
The transmit PLL accepts modulation audio to provide a frequency modulated (FM) RF carrier.
Utilizing a direct modulation approach, the modulation voltage is directly applied to the PLL loop filter.
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