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| 型号： | WJLXT908LC.A4 |
| 厂商： | CORTINA SYSTEMS INC |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封装： | ROHS COMPLIANT, LQFP-64 |
| 文件页数： | 4/46页 |
| 文件大小： | 618K |
| 代理商： | WJLXT908LC.A4 |
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Intel
LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver
12
Datasheet
Document #: 249049
Revision #: 003
Rev. Date: 29-Oct-2005
2.0
Functional Description
2.1
Introduction
The LXT908 Universal 10BASE-T and AUI Transceiver performs the physical layer signaling
(PLS) and Media Attachment Unit (MAU) functions as defined by the IEEE 802.3 specification. It
functions as an AUI (PLS-Only device) for use with 10BASE-2 or 10BASE-5 coaxial cable
networks, or as an Integrated PLS/MAU for use with 10BASE-T twisted-pair (TP) networks. In
addition to standard 10 Mbps operation, the Intel
LXT908 Universal 3.3 V 10BASE-T and AUI
Transceiver also supports full-duplex 20 Mbps operation.
The Intel LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver interfaces a back-end
controller to either an AUI drop cable or a twisted-pair cable. The controller interface includes
transmit and receive clock and NRZ data channels, as well as mode control logic and signaling.
The AUI interface comprises three circuits: Data Output (DO), Data Input (DI), and Collision (CI).
The twisted-pair interface comprises two circuits: Twisted-Pair Input (TPI) and Twisted-Pair
Output (TPO). In addition to the three basic interfaces, the Intel
LXT908 Universal 3.3 V
10BASE-T and AUI Transceiver contains an internal crystal oscillator and four LED drivers for
visual status reporting.
Functions are defined from the back end controller side of the interface. The Intel
LXT908
Universal 3.3 V 10BASE-T and AUI Transceiver Transmit function refers to data transmitted by
the back end to the AUI cable (PLS-Only mode) or to the twisted-pair network (Integrated PLS/
MAU mode). The Intel LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver Receive
function refers to data received by the back end from the AUI cable (PLS-Only) or from the
twisted-pair network (Integrated PLS/MAU mode). In the integrated PLS/MAU mode, the Intel
LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver performs all required MAU functions
defined by the IEEE 802.3 10BASE–T specification, such as collision detection, link integrity
testing, signal quality error messaging, jabber control, and loopback. In the PLS-Only mode, the
Intel LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver receives incoming signals from
the AUI DI circuit with
±18 ns of jitter and drives the AUI DO circuit.
2.1.1
Controller Compatibility Modes
The Intel
LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver is compatible with most
industry-standard controllers including devices produced by Advanced Micro Devices (AMD),
Motorola, Intel, Fujitsu, National Semiconductor, Seeq, and Texas Instruments, as well as custom
controllers. Five different control signal timing and polarity schemes (Modes 1 through 5) are
required to achieve this compatibility. Mode select pins (MD2:0) determine Controller
compatibility modes as listed in Table 2 on page 13. Refer to Test Specifications for a complete set
of timing diagrams for each mode.
2.1.2
Transmit Function
The Intel
LXT908 Universal 3.3 V 10BASE-T and AUI Transceiver receives NRZ data from the
controller at the TXD input as shown in Figure 1, “Block Diagram” on page 7, and passes it
through a Manchester encoder. The encoded data is then transferred to either the AUI cable (the
DO circuit) or the twisted-pair network (the TPO circuit). The advanced integrated pulse shaping
and filtering network produces the output signal on TPON and TPOP, shown in Figure 3. The TPO
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