- 您现在的位置：买卖IC网 > PDF目录140399 > WV3HG64M32EEU665D4SG (MICROSEMI CORP-PMG MICROELECTRONICS) 64M X 32 DDR DRAM MODULE, 0.45 ns, ZMA200 PDF资料下载
参数资料
| 型号： | WV3HG64M32EEU665D4SG |
| 厂商： | MICROSEMI CORP-PMG MICROELECTRONICS |
| 元件分类： | DRAM |
| 英文描述： | 64M X 32 DDR DRAM MODULE, 0.45 ns, ZMA200 |
| 封装： | ROHS COMPLIANT, SODIMM-200 |
| 文件页数： | 8/11页 |
| 文件大小： | 139K |
| 代理商： | WV3HG64M32EEU665D4SG |
WV3HG64M32EEU-D4
October 2006
Rev. 3
ADVANCED
6
White Electronic Designs Corporation (602) 437-1520 www.wedc.com
White Electronic Designs
ICC SPECIFICATION
VCC = +1.8V ± 0.1V
Symbol Proposed Conditions
665
534
403
Units
ICC0*
Operating one bank active-precharge;
tCK = tCK(ICC), tRC = tRC(ICC), tRAS = tRAS min(ICC); CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are SWITCHING; Data bus inputs are SWITCHING
340
320
mA
ICC1*
Operating one bank active-read-precharge;
IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRC = tRC (ICC), tRAS = tRAS min(ICC); CKE is
HIGH, CS# is HIGH between valid commands; Address bus inputs are SWITCHING; Data pattern is
same as ICC4W
400
380
mA
ICC2P**
Precharge power-down current;
All banks idle; tCK = tCK(ICC); CKE is LOW; Other control and address bus inputs are STABLE; Data bus
inputs are FLOATING
32
mA
ICC2Q**
Precharge quiet standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
STABLE; Data bus inputs are FLOATING
140
120
mA
ICC2N**
Precharge standby current;
All banks idle; tCK = tCK(ICC); CKE is HIGH, CS# is HIGH; Other control and address bus inputs are
STABLE; Data bus inputs are SWITCHING
160
140
mA
ICC3P**
Active power-down current;
All banks open; tCK = tCK(ICC); CKE is LOW; Other control and
address bus inputs are STABLE; Data bus inputs are FLOATING
Fast PDN Exit MRS(12) = 0
120
mA
Slow PDN Exit MRS(12) = 1
48
mA
ICC3N**
Active standby current;
All banks open; tCK = tCK(ICC), tRC = tRC(ICC, tRAS = tRAS min(ICC); CKE is HIGH, CS# is HIGH between
valid commands; Other control and address bus inputs are SWITCHING; Data bus inputs are
SWITCHING
220
200
mA
ICC4W*
Operating burst write current;
All banks open, Continuous burst writes; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS = tRASmax(ICC),
tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs are
SWITCHING; Data bus inputs are SWITCHING
560
480
440
mA
ICC4R*
Operating burst read current;
All banks open, Continuous burst reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = 0; tCK = tCK(ICC), tRAS =
tRASmax(ICC), tRP = tRP(ICC); CKE is HIGH, CS# is HIGH between valid commands; Address bus inputs
are SWITCHING; Data pattern is same as ICC4W
580
500
440
mA
ICC5**
Burst auto refresh current;
tCK = tCK(ICC); Refresh command at every tRFC(ICC) interval; CKE is HIGH, CS# is HIGH between valid
commands; Other control and address bus inputs are SWITCHING; Data bus inputs are SWITCHING
600
560
mA
ICC6**
Self refresh current;
CK and CK# at 0V; CKE 0.2V; Other control and address bus inputs
are FLOATING; Data bus inputs are FLOATING
Normal
32
mA
ICC7*
Operating bank interleave read current;
All bank interleaving reads, IOUT = 0mA; BL = 4, CL = CL(ICC), AL = tRCD(ICC)-1*tCK(ICC); tCK = tCK(ICC),
tRC = tRC(ICC), tRRD = tRRD(ICC), tRCD = 1*tCK(ICC); CKE is HIGH, CS# is HIGH between valid commands;
Address bus inputs are STABLE during DESELECTs; Data bus inputs are SWITCHING.
880
mA
ICC specication is based on
SAMSUNG components. Other DRAM manufactures specication may be different.
Note:
*: Value calculated as one module rank in this operating condition, and all other module ranks in ICC2P (CKE LOW) mode.
**: Value calculated reects all module ranks in this operating condition.
相关PDF资料 |
PDF描述 |
|---|---|
| WS512K32L-35G1UIA | 512K X 32 MULTI DEVICE SRAM MODULE, 35 ns, CQFP68 |
| WF128K32-60G2UQ5A | 128K X 32 FLASH 5V PROM MODULE, 60 ns, CQFP68 |
| WS512K32L-17G1TMA | 512K X 32 MULTI DEVICE SRAM MODULE, 17 ns, CQFP68 |
| WS512K32L-55G1UQ | 512K X 32 MULTI DEVICE SRAM MODULE, 55 ns, CQFP68 |
| WF1M32C-150G2CA | 4M X 8 FLASH 12V PROM MODULE, 150 ns, CQMA68 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| WV3HG64M32EEU-D4 | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:256MB - 64Mx32 DDR2 SDRAM UNBUFFERED |
| WV3HG64M64EEU403D4IMG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR2 SDRAM UNBUFFERED, SO-DIMM |
| WV3HG64M64EEU403D4ISG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR2 SDRAM UNBUFFERED, SO-DIMM |
| WV3HG64M64EEU403D4MG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR2 SDRAM UNBUFFERED, SO-DIMM |
| WV3HG64M64EEU403D4SG | 制造商:WEDC 制造商全称:White Electronic Designs Corporation 功能描述:512MB - 64Mx64 DDR2 SDRAM UNBUFFERED, SO-DIMM |
发布紧急采购，3分钟左右您将得到回复。