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参数资料
| 型号： | X25128SI |
| 英文描述： | SPI Serial E 2 PROM with Block Lock TM Protection |
| 中文描述： | SPI串行e的2座门锁TM保护胎膜早破 |
| 文件页数： | 3/15页 |
| 文件大小： | 77K |
| 代理商： | X25128SI |
X25128
3
PRINCIPLES OF OPERATION
The X25128 is a 8K x 8 E
face directly with the synchronous serial peripheral
interface (SPI) of many popular microcontroller fami-
lies.
2
PROM designed to inter-
The X25128 contains an 8-bit instruction register. It is
accessed via the SI input, with data being clocked in
on the rising SCK. CS must be low and the HOLD and
WP inputs must be high during the entire operation.
The WP input is “Don’t Care” if WPEN is set “0”.
Table 1 contains a list of the instructions and their
opcodes. All instructions, addresses and data are
transferred MSB first.
Data input is sampled on the first rising edge of SCK
after CS goes low. SCK is static, allowing the user to
stop the clock and then resume operations. If the clock
line is shared with other peripheral devices on the SPI
bus, the user can assert the HOLD input to place the
X25128 into a “PAUSE” condition. After releasing
HOLD, the X25128 will resume operation from the
point when HOLD was first asserted.
Write Enable Latch
The X25128 contains a “write enable” latch. This latch
must be SET before a write operation will be
completed internally. The WREN instruction will set the
latch and the WRDI instruction will reset the latch. This
latch is automatically reset upon a power-on condition
and after the completion of a byte, page, or status
register write cycle.
Status Register
The RDSR instruction provides access to the status
register. The status register may be read at any time,
even during a write cycle. The status register is
formatted as follows:
3091 FM T02
WPEN, BP0 and BP1 are set by the WRSR instruc-
tion. WEL and WIP are read-only and automatically set
by other operations.
The Write-In-Process (WIP) bit indicates whether the
X25128 is busy with a write operation. When set to a
“1”, a write is in progress, when set to a “0”, no write is
in progress. During a write, all other bits are set to “1”.
The Write Enable Latch (WEL) bit indicates the status
of the “write enable” latch. When set to a “1”, the latch
is set, when set to a “0”, the latch is reset.
The Block Protect (BP0 and BP1) bits are nonvolatile
and allows the user to select one of four levels of
protection. The X25128 is divided into four 32,768-bit
segments. One, two, or all four of the segments may
be protected. That is, the user may read the segments
but will be unable to alter (write) data within the
selected segments. The partitioning is controlled as
illustrated below.
3091 PGM T03
7
6
X
5
X
4
X
3
2
1
0
WPEN
BP1
BP0
WEL
WIP
Status Register Bits
BP1
0
0
1
1
Array Addresses
Protected
None
$3000–$3FFF
$2000–$3FFF
$0000–$3FFF
BP0
0
1
0
1
Table 1. Instruction Set
3091 PGM T04
*Instructions are shown MSB in leftmost position. Instructions are transferred MSB first.
Instruction Name
WREN
WRDI
RDSR
WRSR
READ
Instruction Format*
0000 0110
0000 0100
0000 0101
0000 0001
0000 0011
Operation
Set the Write Enable Latch (Enable Write Operations)
Reset the Write Enable Latch (Disable Write Operations)
Read Status Register
Write Status Register
Read Data from Memory Array beginning at selected address
Write Data to Memory Array beginning at Selected Address
(1 to 32 Bytes)
WRITE
0000 0010
相关PDF资料 |
PDF描述 |
|---|---|
| X25128SM | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128S-2.7 | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128PI-2.7 | SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128SM-2.7 | CA3106ER24-11P |
| X25128Z | Ballast Control, Below Resonance Protection, Thermal Overload Protection, Protection from Failure to Strike, Programmable Preheat Time and Run Frequency, Programmable Deadtime, Automatic Restart for Lamp Exchange in a 16-pin DIP package; Similar to IR21571 with Lead Free Packaging |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X25128SI-2.7 | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SIG | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SIG-2.7 | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
| X25128SM | 制造商:XICOR 制造商全称:Xicor Inc. 功能描述:SPI Serial E 2 PROM with Block Lock TM Protection |
| X25128SM-2.7 | 制造商:ICMIC 制造商全称:IC MICROSYSTEMS 功能描述:SPI Serial E2PROM with Block Lock Protection |
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