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参数资料
| 型号： | X3100V28Z |
| 厂商： | INTERSIL CORP |
| 元件分类： | 电源管理 |
| 英文描述： | 4-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO28 |
| 封装： | ROHS COMPLIANT, PLASTIC, MO-153AE, TSSOP-28 |
| 文件页数： | 11/41页 |
| 文件大小： | 561K |
| 代理商： | X3100V28Z |
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19
FN8110.1
January 3, 2008
Over-Current Protection
In addition to monitoring the battery cell voltages, the
X3100 and X3101 continually monitor the voltage
VCS21 (VCS2 - VCS1) across the current sense resis-
tor (RSENSE). If VCS21 > VOC for a time exceeding
TOC, then the device enters over-current protection
mode (Figure 7). In this mode, the X3100 and X3101
automatically
switch
the
discharge
FET
OFF
(UVP/OCP = Vcc) and hence prevent current from
flowing through the terminals P+ and P-.
Figure 5. Over-Current Protection
The 5VDC voltage regulator output (VRGO) is always
active during an over-current protection mode.
Once the device enters over-current protection mode,
the X3100 and X3101 begin a load monitor state. In
the load monitor state, a small current (ILMON = 7.5A
typ.) is passed out of pin OVP/LMON in order to deter-
mine the load resistance. The load resistance is the
impedance seen looking out of pin OVP/LMON,
between terminal P+ and pin VSS (See Figure 5.)
If the load resistance > ROCR (ILMON = 0A) for a time
exceeding TOCR, then the X3100 or X3101 is released
from over-current protection mode. The discharge FET
is then automatically switched ON (UVP/OCP = Vss)
by the X3100 or X3101, unless the status of UVP/OCP
has been changed in control register (by manipulating
bit UVPC) during the over-current protection mode.
TOC/TOCR are varied using a capacitor (COC) con-
nected between pin OCT and VSS. A list of typical
delay times is shown in Table 23. Note that the value
COC should be larger than 1nF.
The delay TOC and TOCR that results from a particular
capacitance COC can be approximated by the follow-
ing equations:
TOC (ms) ≈ 10,000 x COC (F)
TOCR (ms) ≈ 10,000 x COC (F)
Table 23. Typical Over-Current Delay Times
The value of VOC can be selected from the values
shown in Table 6, by setting bits VOC1, VOC0 in the
configuration register using the WCFIG command.
Note: If the Charge FET is turned off, due to an over-
charge condition or by direct command from the micro-
controller, the cells are not in an undervoltage
condition and the pack has a load, then excessive cur-
rent may flow through Q10 and diode D1. To eliminate
this effect, the gate of Q10 can be turned off by the
microcontroller through an unused X3101 cell balance
output, or directly from a microcontroller port instead of
connecting to VRGO.
FET Control
Circuitry
OVP/LMON
Q2
D1
ILMON
X3100/X3101
P+
P-
ROCR
VCS1
VCS2
VSS
RSENSE
VRGO
Q10
(Load)
Symbol
Description
COC
Delay
TOC
Over-current
detection delay
0.001
F
10ms (Typ)
TOCR
Over-current
release time
0.001
F
10ms (Typ)
X3100, X3101
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相关代理商/技术参数 |
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