参数资料
| 型号： | X40034V14I-CT1 |
| 厂商： | Intersil |
| 文件页数： | 9/23页 |
| 文件大小： | 0K |
| 描述： | IC VOLTAGE MONITOR TRPL 14-TSSOP |
| 标准包装： | 2,500 |
| 类型： | 多压监控器 |
| 监视电压数目： | 3 |
| 输出： | 推挽式，图腾柱 |
| 复位： | 高有效 |
| 复位超时： | 可调节/可选择 |
| 电压 - 阀值： | 1V，2.9V，4.6V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 14-TSSOP（0.173"，4.40mm 宽） |
| 供应商设备封装： | 14-TSSOP |
| 包装： | 带卷 (TR) |
X40030, X40031, X40034, X40035
The new V TRIPX voltage to be applied to VXMON will now
be: V TRIPX (desired) – (V TRIPX (actual) – V TRIPX (desired)).
Note: This operation does not corrupt the memory array.
Setting a Lower V TRIPx Voltage (x=1, 2, 3)
In order to set V TRIPx to a lower voltage than the present
value, then V TRIPx must first be “reset” according to the
procedure described in the following. Once V TRIPx has been
“reset”, then V TRIPx can be set to the desired voltage using
Resetting the V TRIPx Voltage
To reset a V TRIP x voltage, apply the programming voltage
(Vp) to the WDO pin before a START condition is set up on
SDA. Next, issue on the SDA pin the Slave Address A0h
followed by the Byte Address 03h for V TRIP1 , 0Bh for V TRIP2 ,
and 0Fh for V TRIP3 , followed by 00h for the Data Byte in
order to reset V TRIPx . The STOP bit following a valid write
The Control Register is accessed with a special preamble in
the slave byte (1011) and is located at address 1FFh. It can
only be modified by performing a byte write operation directly
to the address of the register and only one data byte is
allowed for each register write operation. Prior to writing to the
Control Register, the WEL and RWEL bits must be set using a
two step process, with the whole sequence requiring 3 steps.
See “Writing to the Control Registers” on page 11.
The user must issue a stop, after sending this byte to the
register, to initiate the nonvolatile cycle that stores WD1,
WD0, PUP1, PUP0 and BP. The X40030, X40031, X40034,
X40035 will not acknowledge any data bytes written after the
first byte is entered.
The state of the Control Register can be read at any time by
performing a random read at address 1FFh, using the
special preamble. Only one byte is read by each register
read operation. The master should supply a stop condition to
be consistent with the bus protocol.
operation initiates the programming sequence. Pin WDO
must then be brought LOW to complete the operation.
After being reset, the value of V TRIPx becomes a nominal
7
PUP1
6
WD1
5
WD0
4
BP
3
0
2
RWEL
1
WEL
0
PUP0
value of 1.7V or lesser.
Note: This operation does not corrupt the memory array.
Set V CC ? 1.5(V2MON or V3MON), when setting V TRIP2 or
V TRIP3 respectively.
RWEL: Register Write Enable Latch (Volatile)
The RWEL bit must be set to “1” prior to a write to the
Control Register.
Control Register
The Control Register provides the user a mechanism for
changing the Block Lock and Watchdog Timer settings. The
Block Lock and Watchdog Timer bits are nonvolatile and do
not change when power is removed.
V P
ADJUST
V2FAIL
RESET
1
14
μC
V TRIP1
ADJ.
6
2
7
X40030
13
9
8
RUN
SCL
V TRIP2
ADJ.
9
FIGURE 5. SAMPLE V TRIP RESET CIRCUIT
SDA
FN8114.2
August 25, 2008
相关PDF资料 |
PDF描述 |
|---|---|
| ISL6363IRTZ | IC CONTROLLER VR12 48TQFN |
| RBM44DSES-S243 | CONN EDGECARD 88POS .156 EYELET |
| X40035S14I-AT1 | IC VOLTAGE MONITOR TRPL 14-SOIC |
| RSM22DSEI-S243 | CONN EDGECARD 44POS .156 EYELET |
| X40035S14I-A | IC VOLTAGE MONITOR TRPL 14-SOIC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| X40034V14IZ-A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14IZ-B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14Z-A | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034V14Z-B | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
| X40034VA | 制造商:INTERSIL 制造商全称:Intersil Corporation 功能描述:Triple Voltage Monitor with Integrated CPU Supervisor |
发布紧急采购，3分钟左右您将得到回复。