参数资料
型号: X4043P-2.7
厂商: Intersil
文件页数: 15/24页
文件大小: 0K
描述: IC CPU SUPERV 4K EE RST LO 8DIP
标准包装: 50
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 100 ms
电压 - 阀值: 2.62V
工作温度: 0°C ~ 70°C
安装类型: 通孔
封装/外壳: 8-DIP(0.300",7.62mm)
供应商设备封装: 8-PDIP
包装: 管件
X4043, X4045
Data Protection
The following circuitry has been included to prevent
Symbol Table
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
prior to the stop bit in order to start a nonvolatile
write cycle.
– A three step sequence is required before writing into
the control register to change watchdog timer or
block lock settings.
– The WP pin, when held HIGH, prevents all writes to
the array and the control register.
– Communication to the device is inhibited as a result
of a low voltage condition (V CC < V TRIP )any in-
WAVEFORM
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
progress communication is terminated.
– Block lock bits can protect sections of the memory
array from write operations.
15
FN8118.2
March 16, 2006
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