参数资料
型号: X4045S8Z-2.7A
厂商: Intersil
文件页数: 8/24页
文件大小: 0K
描述: IC CPU SUPERV 4K EEPROM 8-SOIC
产品培训模块: Solutions for Industrial Control Applications
标准包装: 100
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 高有效
复位超时: 最小为 100 ms
电压 - 阀值: 2.92V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
供应商设备封装: 8-SOIC
包装: 管件
X4043, X4045
Figure 5. V TRIP Programming Sequence
V TRIP Programming
Let: MDE = Maximum Desired Error
No
Desired
V TRIP <
Present Value ?
MDE +
Acceptable
YES
Execute
Desired Value
MDE –
Error Range
V TRIP Reset Sequence
Error = Actual – Desired
Set V CC = desired V TRIP
New V CC applied =
Old V CC applied + | Error |
NO
Execute
Set Higher V TRIP Sequence
Power-down
the Device
Ramp V CC
Output Switches?
(RESET)
YES
New V CC applied =
Old V CC applied – | Error |
Execute Reset V TRIP
Sequence
Error < MDE –
Actual V TRIP –
Desired V TRIP
= Error
| Error | < | MDE |
DONE
Error > MDE +
Control Register
The control register provides the user a mechanism for
changing the block lock and watchdog timer settings.
The block lock and watchdog timer bits are nonvolatile
and do not change when power is removed.
The control register is accessed with a special pream-
ble in the slave byte (1011) and is located at address
1FFh. It can only be modified by performing a byte
write operation directly to the address of the register
and only one data byte is allowed for each register
write operation. Prior to writing to the control register,
the WEL and RWEL bits must be set using a two step
process, with the whole sequence requiring 3 steps.
See "Writing to the Control Register".
8
The user must issue a stop after sending this byte to
the register to initiate the nonvolatile cycle that stores
WD1, WD0, BP2, BP1, and BP0. The X4043/45 will
not acknowledge any data bytes written after the first
byte is entered.
FN8118.2
March 16, 2006
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