参数资料
型号: X4C105V20-3AT1
厂商: Intersil
文件页数: 9/14页
文件大小: 0K
描述: IC SUPERVISOR NOVRAM/EE 20-TSSOP
标准包装: 2,500
类型: 简单复位/加电复位
监视电压数目: 1
输出: 开路漏极或开路集电极
复位: 低有效
复位超时: 最小为 100 ms
电压 - 阀值: 2.875V
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 带卷 (TR)
X4C105
Serial Nonvolatile Write Cycle Timing
TYP
SYMBOL
t WC (Note 5)
Write Cycle Time
PARAMETER
MIN
(Note 5)
3
MAX
5
UNIT
ms
NOTE:
5. t WC is the time from a valid stop condition at the end of a write sequence to the end of the self-timed internal nonvolatile write cycle. It is the
minimum cycle time to be allowed for any nonvolatile write by the user, unless acknowledge polling is used.
Serial Memory AC Characteristics
Serial AC Test Conditions
Equivalent AC Output Load Circuit for V CC = 3.0V
to 3.6V
3 .3V
Input pulse levels
V CC x 0.1 to V CC x 0.9
Input rise and fall times
10ns
1533 Ω
FOR V OL = 0.4V
Input and output timing levels
Output load
V CC x 0.5
Standard output load
SDA
100pF
AND I OL = 2mA
Electrical Specifications
T A = -40 ° C to +85 ° C, V CC = +3.0V to +3.6V, unless otherwise specified. Parameters with MIN and/or MAX limits
are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and
are not production tested.
400kHz OPTION
SYMBOL
f SCL
t IN
t AA
t BUF
t LOW
t HIGH
t SU:STA
t HD:STA
t SU:DAT
t HD:DAT
t SU:STO
t DH
t R
t F
PARAMETER
SCL Clock Frequency
Pulse Width of Spikes to be Suppressed by the Input Filter
SCL Low to SDA Data Out Valid
Time the Bus Must be Free Before a New Transmission Can Start
Clock Low Time
Clock High Time
Start Condition Set-up Time
Start Condition Hold Time
Data In Set-up Time
Data In Hold Time
Stop Condition Set-up Time
Data Output Hold Time
SDA and SCL Rise Time
SDA And SCL Fall Time
MIN
0
0
0.1
1.3
1.3
0.6
0.6
0.6
100
0
0.6
50
20 + 0.1Cb (Note 6)
20 + 0.1Cb (Note 6)
MAX
400
50
0.9
300
300
UNIT
kHz
ns
μs
μs
μs
μs
μs
μs
ns
μs
μs
ns
ns
ns
t SU: S1, S2,WP
t HD: S1, S2,WP
Cb
S1, S2 and WP Set-up Time
S1, S2 and WP Hold Time
Capacitive Load for Each Bus Line
0.4
0.4
400
ms
ms
pF
NOTES:
6. Cb = total capacitance of one bus line in pF.
9
FN8124.2
July 3, 2008
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