参数资料
型号: XC2S50-5FG256I
厂商: Xilinx Inc
文件页数: 2/99页
文件大小: 0K
描述: IC FPGA 2.5V I-TEMP 256-FBGA
标准包装: 90
系列: Spartan®-II
LAB/CLB数: 384
逻辑元件/单元数: 1728
RAM 位总计: 32768
输入/输出数: 176
门数: 50000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 256-BGA
供应商设备封装: 256-FBGA(17x17)
Spartan-II FPGA Family: Functional Description
DS001-2 (v2.8) June 13, 2008
Module 2 of 4
Product Specification
10
R
Storage Elements
Storage elements in the Spartan-II FPGA slice can be
configured either as edge-triggered D-type flip-flops or as
level-sensitive latches. The D inputs can be driven either by
function generators within the slice or directly from slice
inputs, bypassing the function generators.
In addition to Clock and Clock Enable signals, each slice
has synchronous set and reset signals (SR and BY). SR
forces a storage element into the initialization state
specified for it in the configuration. BY forces it into the
opposite state. Alternatively, these signals may be
configured to operate asynchronously.
All control signals are independently invertible, and are
shared by the two flip-flops within the slice.
Additional Logic
The F5 multiplexer in each slice combines the function
generator outputs. This combination provides either a
function generator that can implement any 5-input function,
a 4:1 multiplexer, or selected functions of up to nine inputs.
Figure 4: Spartan-II CLB Slice (two identical slices in each CLB)
I3
I4
I2
I1
Look-Up
Table
D
CK
EC
Q
R
S
I3
I4
I2
I1
O
Look-Up
Table
D
CK
EC
Q
R
S
XQ
X
XB
CE
CLK
CIN
BX
F1
F2
F3
SR
BY
F5IN
G1
G2
YQ
Y
YB
COUT
G3
G4
F4
Carry
and
Control
Logic
Carry
and
Control
Logic
DS001_04_091400
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