参数资料
型号: XC2S50-5FG256I
厂商: Xilinx Inc
文件页数: 65/99页
文件大小: 0K
描述: IC FPGA 2.5V I-TEMP 256-FBGA
标准包装: 90
系列: Spartan®-II
LAB/CLB数: 384
逻辑元件/单元数: 1728
RAM 位总计: 32768
输入/输出数: 176
门数: 50000
电源电压: 2.375 V ~ 2.625 V
安装类型: 表面贴装
工作温度: -40°C ~ 100°C
封装/外壳: 256-BGA
供应商设备封装: 256-FBGA(17x17)
Spartan-II FPGA Family: DC and Switching Characteristics
DS001-3 (v2.8) June 13, 2008
Module 3 of 4
Product Specification
68
R
Revision History
Date
Version No.
Description
09/18/00
2.0
Sectioned the Spartan-II Family data sheet into four modules. Updated timing to reflect the
latest speed files. Added current supply numbers and XC2S200 -5 timing numbers. Approved
-5 timing numbers as preliminary information with exceptions as noted.
11/02/00
2.1
Removed Power Down feature.
01/19/01
2.2
DC and timing numbers updated to Preliminary for the XC2S50 and XC2S100. Industrial
power-on current specifications and -6 DLL timing numbers added. Power-on specification
clarified.
03/09/01
2.3
Added note on power sequencing. Clarified power-on current requirement.
08/28/01
2.4
Added -6 preliminary timing. Added typical and industrial standby current numbers. Specified
min. power-on current by junction temperature instead of by device type (Commercial vs.
Industrial). Eliminated minimum VCCINT ramp time requirement. Removed footnote limiting
DLL operation to the Commercial temperature range.
07/26/02
2.5
Clarified that I/O leakage current is specified over the Recommended Operating Conditions for
VCCINT and VCCO.
08/26/02
2.6
Added references for XAPP450 to Power-On Current Specification.
09/03/03
2.7
Added relaxed minimum power-on current (ICCPO) requirements to page 53. On page 64,
moved TRPW values from maximum to minimum column.
06/13/08
2.8
Updated I/O measurement thresholds. Updated description and links. Updated all modules for
continuous page, figure, and table numbering. Synchronized all modules to v2.8.
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