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型号： XC5VLX110-1FF1153C
厂商： Xilinx Inc
文件页数： 84/91页
文件大小： 0K
描述： IC FPGA VIRTEX-5 110K 1153FBGA
标准包装： 1
系列： Virtex®-5 LX
LAB/CLB数： 8640
逻辑元件/单元数： 110592
RAM 位总计： 4718592
输入/输出数： 800
电源电压： 0.95 V ~ 1.05 V
安装类型： 表面贴装
工作温度： 0°C ~ 85°C
封装/外壳： 1153-BBGA，FCBGA
供应商设备封装： 1153-FCBGA（35x35）
配用： 568-5088-ND - BOARD DEMO DAC1408D750
HW-V5-ML523-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5
HW-AFX-FF1153-500-G-ND - BOARD DEV VIRTEX 5 FF1153
Virtex-5 FPGA Data Sheet: DC and Switching Characteristics
DS202 (v5.3) May 5, 2010
www.xilinx.com
Product Specification
85
Revision History
The following table shows the revision history for this document.
Table 100: Sample Window
Symbol
Description
Device
Speed Grade
Units
-3
-2
-1
TSAMP
Sampling Error at Receiver Pins(1)
All
450
500
550
ps
TSAMP_BUFIO
Sampling Error at Receiver Pins using BUFIO(2)
All
350
400
450
ps
Notes:
1.
This parameter indicates the total sampling error of Virtex-5 FPGA DDR input registers across voltage, temperature, and process. The
characterization methodology uses the DCM to capture the DDR input registers’ edges of operation. These measurements include:
- CLK0 DCM jitter
- DCM accuracy (phase offset)
- DCM phase shift resolution
These measurements do not include package or clock tree skew.
2.
This parameter indicates the total sampling error of Virtex-5 FPGA DDR input registers across voltage, temperature, and process. The
characterization methodology uses the BUFIO clock network and IODELAY to capture the DDR input registers’ edges of operation. These
measurements do not include package or clock tree skew.
Table 101: Source-Synchronous Pin-to-Pin Setup/Hold and Clock-to-Out
Symbol
Description
Speed Grade
Units
-3
-2
-1
Data Input Setup and Hold Times Relative to a Forwarded Clock Input Pin Using BUFIO
TPSCS/TPHCS
Setup/Hold of I/O clock
–0.56
1.59
–0.54
1.72
–0.54
1.91
ns
Pin-to-Pin Clock-to-Out Using BUFIO
TICKOFCS
Clock-to-Out of I/O clock
4.42
4.82
5.40
ns
Date
Version
Revision
04/14/06
1.0
Initial Xilinx release.
05/12/06
1.1
First version posted to the Xilinx website. Minor typographical edits. Revised design software version on
page 30.
Revised TIDELAYRESOLUTION in Table 64, page 44.
Revised TDSPCKO in Table 69, page 48.
05/24/06
1.2
Added register-to-register parameters to Table 52.
08/04/06
1.3
Added VDRINT, VDRI, and CIN values to Table 3.
Added HSTL_I_12 and LVCMOS12 to Table 7 and renumbered the notes.
Removed pin-to-pin performance (Table 12). Updated and added values to register-register
performance Table 52 (was Table 13).
Added values to Table 53.
Updated the speed specification version above Table 54.
Added to Table 56 the I/O standards: HSTL_II_T_DCI, HSTL_II_T_DCI_18, SSTL2_II_T_DCI, and
SSTL18_II_T_DCI.
Revised FMAX values in Table 68, and RDWR_B Setup/Hold values in Table 70.
In Table 74, changed FVCOMAX, removed TLOCKMIN, and revised TLOCKMAX values, also removed note
pointing to Architecture Wizard.
Removed Note 2 on Table 88.
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XC5VLX110-1FF1153CES 制造商:Xilinx 功能描述:
XC5VLX110-1FF1153I 功能描述:IC FPGA VIRTEX-5 110K 1153FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LX 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55）
XC5VLX110-1FF1760C 功能描述:IC FPGA VIRTEX-5 110K 1760FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LX 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
XC5VLX110-1FF1760I 功能描述:IC FPGA VIRTEX-5 110K 1760FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LX 产品变化通告:XC4000(E,L) Discontinuation 01/April/2002 标准包装:24 系列:XC4000E/X LAB/CLB数:100 逻辑元件/单元数:238 RAM 位总计:3200 输入/输出数:80 门数:3000 电源电压:4.5 V ~ 5.5 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:120-BCBGA 供应商设备封装:120-CPGA（34.55x34.55）
XC5VLX110-1FF676C 功能描述:IC FPGA VIRTEX-5 110K 676FBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - FPGA（现场可编程门阵列） 系列:Virtex®-5 LX 产品变化通告:Step Intro and Pkg Change 11/March/2008 标准包装:1 系列:Virtex®-5 SXT LAB/CLB数:4080 逻辑元件/单元数:52224 RAM 位总计:4866048 输入/输出数:480 门数:- 电源电压:0.95 V ~ 1.05 V 安装类型:表面贴装 工作温度:-40°C ~ 100°C 封装/外壳:1136-BBGA，FCBGA 供应商设备封装:1136-FCBGA 配用:568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
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