参数资料
型号: XCS10XL-4PC84C
厂商: XILINX INC
元件分类: FPGA
英文描述: Spartan and Spartan-XL Families Field Programmable Gate Arrays
中文描述: FPGA, 196 CLBS, 3000 GATES, 217 MHz, PQCC84
封装: PLASTIC, LCC-84
文件页数: 50/83页
文件大小: 770K
代理商: XCS10XL-4PC84C
Spartan and Spartan-XL FPGA Families Data Sheet
54
DS060 (v1.8) June 26, 2008
Product Specification
R
Spartan-XL Family Global Buffer Switching Characteristic Guidelines
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values where one
global clock input drives one vertical clock line in each
accessible column, and where all accessible IOB and CLB
flip-flops are clocked by the global clock net.
When fewer vertical clock lines are connected, the clock dis-
tribution is faster; when multiple clock lines per column are
driven from the same global clock, the delay is longer. For
more specific, more precise, and worst-case guaranteed
data, reflecting the actual routing structure, use the values
provided by the static timing analyzer (TRCE in the Xilinx
Development System) and back-annotated to the simulation
netlist. These path delays, provided as a guideline, have
been extracted from the static timing analyzer report. All
timing parameters assume worst-case operating conditions
(supply voltage and junction temperature).
Symbol
Description
Device
Speed Grade
Units
-5
-4
Max
TGLS
From pad through buffer, to any clock K
XCS05XL
1.4
1.5
ns
XCS10XL
1.7
1.8
ns
XCS20XL
2.0
2.1
ns
XCS30XL
2.3
2.5
ns
XCS40XL
2.6
2.8
ns
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