- 您现在的位置：买卖IC网 > PDF目录300152 > XCS20XL-3BG280C (Xilinx, Inc.) Spartan and Spartan-XL Families Field Programmable Gate Arrays PDF资料下载
参数资料
| 型号： | XCS20XL-3BG280C |
| 厂商： | Xilinx, Inc. |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | 斯巴达和Spartan - xL的家庭现场可编程门阵列 |
| 文件页数： | 25/82页 |
| 文件大小： | 863K |
| 代理商： | XCS20XL-3BG280C |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页当前第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页
Spartan and Spartan-XL Families Field Programmable Gate Arrays
DS060 (v1.6) September 19, 2001
Product Specification
1-800-255-7778
R
Setting CCLK Frequency
In Master mode, CCLK can be generated in either of two
frequencies. In the default slow mode, the frequency ranges
from 0.5 MHz to 1.25 MHz for Spartan/XL devices. In fast
CCLK mode, the frequency ranges from 4 MHz to 10 MHz
for Spartan/XL devices. The frequency is changed to fast by
an option when running the bitstream generation software.
Data Stream Format
The data stream ("bitstream") format is identical for both
serial configuration modes, but different for the Spartan-XL
Express mode. In Express mode, the device becomes
active when DONE goes High, therefore no length count is
required. Additionally, CRC error checking is not supported
in Express mode. The data stream format is shown in
Table 16. Bit-serial data is read from left to right. Express
mode data is shown with D0 at the left and D7 at the right.
The configuration data stream begins with a string of eight
ones, a preamble code, followed by a 24-bit length count
and a separator field of ones (or 24 fill bits, in Spartan-XL
Express mode). This header is followed by the actual con-
figuration data in frames. The length and number of frames
depends on the device type (see Table 17).
Each frame
begins with a start field and ends with an error check. In
serial modes, a postamble code is required to signal the end
of data for a single device. In all cases, additional start-up
bytes of data are required to provide four clocks for the star-
tup sequence at the end of configuration. Long daisy chains
require additional startup bytes to shift the last data through
the chain. All start-up bytes are "don’t cares".
Figure 28: Express Mode Programming Switching Characteristics
DS060_28_080400
BYTE
0
CCLK
FPGA Filled
INIT
TDC
TCD
TIC
D0-D7
DOUT
BYTE
1
BYTE
6
Header Received
Symbol
Description
Min
Max
Units
TIC
CCLK
INIT (High) setup time
5
-
s
TDC
D0-D7 setup time
20
-
ns
TCD
D0-D7 hold time
0
-
ns
TCCH
CCLK High time
45
-
ns
TCCL
CCLK Low time
45
-
ns
FCC
CCLK Frequency
-
10
MHz
Notes:
1.
If not driven by the preceding DOUT, CS1 must remain High until the
device is fully configured.
相关PDF资料 |
PDF描述 |
|---|---|
| XCS20XL-3BG280I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3BG84I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3CS100C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3CS100I | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3CS144C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS20XL-3BG280I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3BG84C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3BG84I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3CS100C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20XL-3CS100I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
发布紧急采购，3分钟左右您将得到回复。