- 您现在的位置：买卖IC网 > PDF目录300150 > XCS30XL-5PQ240C (XILINX INC) Spartan and Spartan-XL Families Field Programmable Gate Arrays PDF资料下载
参数资料
| 型号： | XCS30XL-5PQ240C |
| 厂商： | XILINX INC |
| 元件分类： | FPGA |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | FPGA, 576 CLBS, 10000 GATES, 250 MHz, PQFP240 |
| 封装： | PLASTIC, QFP-240 |
| 文件页数： | 39/83页 |
| 文件大小： | 770K |
| 代理商： | XCS30XL-5PQ240C |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页当前第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页
Spartan and Spartan-XL FPGA Families Data Sheet
44
DS060 (v1.8) June 26, 2008
Product Specification
R
Spartan Family CLB Switching Characteristic Guidelines
All devices are 100% functionally tested. Internal timing
parameters are derived from measuring internal test pat-
terns. Listed below are representative values. For more
specific, more precise, and worst-case guaranteed data,
use the values reported by the static timing analyzer (TRCE
in the Xilinx Development System) and back-annotated to
the simulation netlist. All timing parameters assume
worst-case operating conditions (supply voltage and junc-
tion temperature). Values apply to all Spartan devices and
expressed in nanoseconds unless otherwise noted.
Symbol
Description
Speed Grade
Units
-4
-3
MinMax
Clocks
TCH
Clock High time
3.0
-
4.0
-
ns
TCL
Clock Low time
3.0
-
4.0
-
ns
Combinatorial Delays
TILO
F/G inputs to X/Y outputs
-
1.2
-
1.6
ns
TIHO
F/G inputs via H to X/Y outputs
-
2.0
-
2.7
ns
THH1O
C inputs via H1 via H to X/Y outputs
-
1.7
-
2.2
ns
CLB Fast Carry Logic
TOPCY
Operand inputs (F1, F2, G1, G4) to COUT
-
1.7
-
2.1
ns
TASCY
Add/Subtract input (F3) to COUT
-
2.8
-
3.7
ns
TINCY
Initialization inputs (F1, F3) to COUT
-
1.2
-
1.4
ns
TSUM
CIN through function generators to X/Y outputs
-
2.0
-
2.6
ns
TBYP
CIN to COUT, bypass function generators
-
0.5
-
0.6
ns
Sequential Delays
TCKO
Clock K to Flip-Flop outputs Q
-
2.1
-
2.8
ns
Setup Time before Clock K
TICK
F/G inputs
1.8
-
2.4
-
ns
TIHCK
F/G inputs via H
2.9
-
3.9
-
ns
THH1CK
C inputs via H1 through H
2.3
-
3.3
-
ns
TDICK
C inputs via DIN
1.3
-
2.0
-
ns
TECCK
C inputs via EC
2.0
-
2.6
-
ns
TRCK
C inputs via S/R, going Low (inactive)
2.5
-
4.0
-
ns
Hold Time after Clock K
All Hold times, all devices
0.0
-
0.0
-
ns
Set/Reset Direct
TRPW
Width (High)
3.0
-
4.0
-
ns
TRIO
Delay from C inputs via S/R, going High to Q
-
3.0
-
4.0
ns
Global Set/Reset
TMRW
Minimum GSR pulse width
11.5
-
13.5
-
ns
TMRQ
Delay from GSR input to any Q
FTOG
Toggle Frequency (MHz)
(for export control purposes)
-
166
-
125
MHz
相关PDF资料 |
PDF描述 |
|---|---|
| XCS30XL-5TQ144C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-4PQ208C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-4PQ240C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40XL-5CS280C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20-3TQ84C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS30XL-5PQ240I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL FPGA |
| XCS30XL-5PQ256C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ256I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ280C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ280I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
发布紧急采购，3分钟左右您将得到回复。