- 您现在的位置：买卖IC网 > PDF目录300150 > XCS30XL-5PQ240C (XILINX INC) Spartan and Spartan-XL Families Field Programmable Gate Arrays PDF资料下载
参数资料
| 型号： | XCS30XL-5PQ240C |
| 厂商： | XILINX INC |
| 元件分类： | FPGA |
| 英文描述： | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| 中文描述： | FPGA, 576 CLBS, 10000 GATES, 250 MHz, PQFP240 |
| 封装： | PLASTIC, QFP-240 |
| 文件页数： | 56/83页 |
| 文件大小： | 770K |
| 代理商： | XCS30XL-5PQ240C |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页当前第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页
Spartan and Spartan-XL FPGA Families Data Sheet
6
DS060 (v1.8) June 26, 2008
Product Specification
R
The four internal control signals are:
EC: Enable Clock
SR: Asynchronous Set/Reset or H function generator
Input 0
DIN: Direct In or H function generator Input 2
H1: H function generator Input 1.
Input/Output Blocks (IOBs)
User-configurable input/output blocks (IOBs) provide the
interface between external package pins and the internal
logic. Each IOB controls one package pin and can be con-
figured for input, output, or bidirectional signals. Figure 6
shows a simplified functional block diagram of the Spar-
tan/XL FPGA IOB.
IOB Input Signal Path
The input signal to the IOB can be configured to either go
directly to the routing channels (via I1 and I2 in Figure 6) or
to the input register. The input register can be programmed
as either an edge-triggered flip-flop or a level-sensitive
latch. The functionality of this register is shown in Table 3,
and a simplified block diagram of the register can be seen in
Figure 4: CLB Control Signal Interface
Multiplexer Controlled
by Configuration Program
C1
DIN
H1
SR
EC
C2
C3
C4
DS060_04_081100
Figure 5: IOB Flip-Flop/Latch Functional Block
Diagram
Table 3: Input Register Functionality
Mode
CK
EC
D
Q
Power-Up or
GSR
XX
X
SR
Flip-Flop
1*
D
0X
X
Q
Latch
1
1*
X
Q
01*
D
Both
X
0
X
Q
Legend:
X
Don’t care.
Rising edge (clock not inverted).
SR
Set or Reset value. Reset is default.
0*
Input is Low or unconnected (default
value)
1*
Input is High or unconnected (default
value)
Multiplexer Controlled
by Configuration Program
DQ
Q
D
GSR
Vcc
CK
EC
SD
RD
DS060_05_041901
相关PDF资料 |
PDF描述 |
|---|---|
| XCS30XL-5TQ144C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-4PQ208C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40-4PQ240C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS40XL-5CS280C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS20-3TQ84C | Spartan and Spartan-XL Families Field Programmable Gate Arrays |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XCS30XL-5PQ240I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL FPGA |
| XCS30XL-5PQ256C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ256I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ280C | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
| XCS30XL-5PQ280I | 制造商:XILINX 制造商全称:XILINX 功能描述:Spartan and Spartan-XL Families Field Programmable Gate Arrays |
发布紧急采购，3分钟左右您将得到回复。