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参数资料
| 型号： | XD-14592F5-554Q |
| 厂商： | DATA DEVICE CORP |
| 元件分类： | 位置变换器 |
| 英文描述： | SYNCHRO OR RESOLVER TO DIGITAL CONVERTER, CDMA36 |
| 封装： | CERAMIC, FP-36 |
| 文件页数： | 10/16页 |
| 文件大小： | 150K |
| 代理商： | XD-14592F5-554Q |
3
Data Device Corporation
www.ddc-web.com
SD-14590/91/92
D-02/02-250
VALUE
PARAMETER
UNIT
TABLE 1. SD-14590/91/92 SPECIFICATIONS
These specifications apply over the rated power supply, temperature,
and reference frequency ranges; 10% signal amplitude variation and
10% harmonic distortion.
RESOLUTION (NOTE 1)
ACCURACY (NOTE 2)
REPEATABILITY
DIFFERENTIAL LINEARITY
SIGNAL INPUT
CHARACTERISTICS
(voltage options and minimum
input impedance balanced)
Synchro
Zin line-to-line
Zin each line-to-ground
Resolver
Zin single ended
Zin differential
Zin each line-to-ground
Common-mode Range
Direct (1 VL-L)
Input Signal Type
Sin/Cos Voltage Range
Max Voltage w/o Damage
Input Impedance
REFERENCE SYNTHESIZER
±Sig/Ref Phase Shift
POWER SUPPLY
CHARACTERISTICS
Nominal Voltage
Voltage Range
Max Voltage w/o Damage
Current
TEMPERATURE RANGES
Operating
-30X
-20X
-10X
Storage
PHYSICAL
CHARACTERISTICS
Size
Weight
in.
(mm.)
oz
(g)
1.9 x 0.78 x 0.21
(48.3 x 19.8 x 5.3)
36 Pin Double Dip
0.7 max
(20)
°C
0 to +70
-40 to +85
-55 to +125
-65 to +150
±%
V
mA max
+15V
+5V
510
+18
+8
25
10
V
Ohm
V
Ohm
V
Vrms
Ohm
Deg
45 typ, 60 max
11.8 VL-L
17.5k
11.5k
11.8 VL-L
23k
46k
23k
25 max
90 VL-L
130k
85k
26 VL-L
50k
100k
50k
60 max
Bits
Minutes
LSB
14, 16, 14/16
4, 2, or 1 +1 LSB
1 max
1 max in the 16th bit
REFERENCE INPUT
CHARACTERISTICS
Carrier Frequency Ranges
Nominal 400 Hz Units
Nominal 60 Hz Units
Voltage Range
Input Impedance
Single Ended
Differential
Common Mode Range
Hz
Vrms
Ohm
V
360 - 1000
47 - 1000
4 - 130
250k min
500k min
210 peak max
500 transient peak
ANALOG OUTPUTS
Velocity (VEL)
AC error (e)
Bias Voltage (V)
Load
See Tables 3 and 4
3.125 16 bit mode
6.130 14 bit mode
1/3 Vs ±10%
3 min
mV rms
kOhm
TABLE 1. SD-14590/91/92 SPECIFICATIONS (CONT.)
These specifications apply over the rated power supply, temperature,
and reference frequency ranges; 10% signal amplitude variation and
10% harmonic distortion.
VALUE
PARAMETER
UNIT
Output Parallel Data
Converter Busy (CB)
BIT
Drive Capability
14 or 16 parallel lines; natural
binary angle, positive logic
0.4 to 2 s positive pulse;
leading edge initiates counter
update.
Logic 1 for fault.
50 pF plus rated logic drive.
Logic 0; 1 TTL load,
1.6 mA at 0.4 Vmax
Logic 1; 10 TTL loads
0.4 mA at 2.8 Vmin
High Z; 10 A//5 pF max
Logic 0; 100 mV max
driving CMOS
Logic 1; +5 V supply minus
100 mV min driving CMOS
bits
DIGITAL INPUT/OUTPUT
Logic Type
Inputs
Inhibit (INH)
Enable MSB’s (EM) (Note 3)
Pull down
Enable LSB’s (EL) (Note 3)
Pull down
Resolution Control (A)
(SD-14590 only)
(Unused Output Data Bits
Are Set to 0)
TTL/CMOS compatible
Logic 0 = 0.8 V max
Logic 1 = 2.0 V min
Loading = 30 A max P.U.
current source
to +5 V//5pF max
CMOS transient protected
Logic 0 inhibits
Data stable after 0.5s
Logic 0 enables
Logic 1 High Z
30A
Logic 0 enables
Logic 1 High Z
30A
1
14 bits
0
16 bits
Sin and Cos resolver sig-
nals referenced to converter
internal DC reference V.
1 V nominal, 1.15 V max
15 V continuous
100 V Peak Transient
Zin > 20M//10 pF
voltage follower
DYNAMIC
CHARACTERISTICS
See TABLE 3
TRANSFORMER
CHARACTERISTICS
(See ordering information for
list of Transformers.
Reference Transformers are
Optional for Both Solid-State
and Voltage Follower Input
Options.)
400 Hz TRANSFORMERS
Reference Transformer
Carrier Frequency Range
Voltage Range
Input Impedance
Breakdown Voltage to GND
360 - 1000 Hz
18 - 130 V
40 k
min
1200 V peak
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