参数资料
型号: XR16C854CQ-F
厂商: Exar Corporation
文件页数: 31/53页
文件大小: 0K
描述: IC UART FIFO 128B QUAD 100QFP
标准包装: 66
特点: *
通道数: 4,QUART
FIFO's: 128 字节
规程: RS232,RS485
电源电压: 2.97 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 100-BQFP
供应商设备封装: 100-QFP(14x20)
包装: 托盘
其它名称: 1016-1447
1016-1447-ND
1016-1654
XR16C854CQ-F-ND
XR16C854/854D
37
REV. 3.1.0
2.97V TO 5.5V QUAD UART WITH 128-BYTE FIFO
4.16
Trigger Level (TRG) - Write-Only
User Programmable Transmit/Receive Trigger Level Register.
TRG[7:0]: Trigger Level Register
These bits are used to program desired trigger levels when trigger Table-D is selected. FCTR bit-7 selects
between programming the RX Trigger Level (a logic 0) and the TX Trigger Level (a logic 1).
4.17
FIFO Data Count Register (FC) - Read-Only
This register is accessible when LCR = 0xBF. Note that this register is not identical to the FIFO Level Count
Register which is located in the general register set when FCTR bit-6 = 1 (Scratchpad Register Swap). It is
suggested to read the FIFO Level Count Register at the Scratchpad Register location when FCTR bit-6 = 1.
See Table 14.
FC[7:0]: FIFO Data Count Register
Transmit/Receive FIFO Count. Number of characters in Transmit (FCTR[7] = 1) or Receive FIFO (FCTR[7] =
0) can be read via this register.
4.18
Feature Control Register (FCTR) - Read/Write
This register controls the XR16C854 new functions that are not available in ST16C554 or ST16C654.
FCTR[1:0]: RTS Hysteresis
User selectable RTS# hysteresis levels for hardware flow control application. After reset, these bits are set to
“0” to select the next trigger level for hardware flow control. See Table 15 for more details.
FCTR[2]: IrDA RX Inversion
Logic 0 = Select RX input as encoded IrDA data (Idle state will be logic 0).
Logic 1 = Select RX input as inverted encoded IrDA data (Idle state will be logic 1).
FCTR[3]: Auto RS-485 Direction Control
The Auto RS-485 Direction Control is not available in the XR16C854. See XR16C864. However, this bit
changes the TX Ready Interrupt behavior. See Table 3.
FCTR[5:4]: Transmit/Receive Trigger Table Select
See Table 11 for more details.
FCTR[6]: Scratchpad Swap
Logic 0 = Scratch Pad register is selected as general read and write register. ST16C550 compatible mode.
Logic 1 = FIFO Count register (Read-Only), Enhanced Mode Select Register (Write-Only). Number of
characters in transmit or receive holding register can be read via scratch pad register when this bit is set.
Enhanced Mode Select Register is selected when it is written into.
TABLE 17: TRIGGER TABLE SELECT
FCTR
BIT-5
FCTR
BIT-4
TABLE
0
Table-A (TX/RX)
0
1
Table-B (TX/RX)
1
0
Table-C (TX/RX)
1
Table-D (TX/RX)
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