参数资料
型号: XR16L2551IM-F
厂商: Exar Corporation
文件页数: 45/49页
文件大小: 0K
描述: IC UART FIFO 16B DUAL 48TQFP
标准包装: 250
特点: *
通道数: 2,DUART
FIFO's: 16 字节
规程: RS232,RS485
电源电压: 2.25 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
带CMOS:
安装类型: 表面贴装
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
其它名称: XR16L2551IM-F-ND
XR16L2551
5
REV. 1.1.3
LOW VOLTAGE DUART WITH POWERSAVE
OP2A#
-
32
O
Output Port 2 Channel A - The output state is defined by the user and
through the software setting of MCR[3]. INTA is set to the active mode
and OP2A# output to a logic 0 when MCR[3] is set to a logic 1. INTA is
set to the three state mode and OP2A# to a logic 1 when MCR[3] is set
to a logic 0. This output should not be used as a general output else it
will disturb the INTA output functionality. If it is not used at all, leave it
unconnected.
TXB
6
8
O
UART channel B Transmit Data. If it is not used, leave it unconnected.
RXB
3
4
I
UART channel B Receive Data. Normal receive data input must idle at
logic 1 condition. If it is not used, tie it to VCC or pull it high via a 100k
ohm resistor.
RTSB#
15
22
O
UART channel B Request-to-Send (active low) or general purpose out-
put. If it is not used, leave it unconnected.
CTSB#
16
23
I
UART channel B Clear-to-Send (active low) or general purpose input.
This input should be connected to VCC when not used.
DTRB#
-
35
O
UART channel B Data-Terminal-Ready (active low) or general purpose
output. If it is not used, leave it unconnected.
DSRB#
-
20
I
UART channel B Data-Set-Ready (active low) or general purpose
input. This input should be connected to VCC when not used. This
input has no effect on the UART.
CDB#
-
16
I
UART channel B Carrier-Detect (active low) or general purpose input.
This input should be connected to VCC when not used. This input has
no effect on the UART.
RIB#
-
21
I
UART channel B Ring-Indicator (active low) or general purpose input.
This input should be connected to VCC when not used. This input has
no effect on the UART.
OP2B#
-
9
O
Output Port 2 Channel B - The output state is defined by the user and
through the software setting of MCR[3]. INTB is set to the active mode
and OP2B# output to a logic 0 when MCR[3] is set to a logic 1. INTB is
set to the three state mode and OP2B# to a logic 1 when MCR[3] is set
to a logic 0. This output should not be used as a general output else it
will disturb the INTB output functionality. If it is not used, leave it uncon-
nected.
ANCILLARY SIGNALS
XTAL1
10
13
I
Crystal or external clock input.
XTAL2
11
14
O
Crystal or buffered clock output.
16/68#
17
24
I
Intel or Motorola Bus Select.
When 16/68# pin is at logic 1, 16 or Intel Mode, the device will operate
in the Intel bus type of interface.
When 16/68# pin is at logic 0, 68 or Motorola mode, the device will
operate in the Motorola bus type of interface.
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
TYPE
DESCRIPTION
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