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参数资料
| 型号： | XR16V2551IL-0B-EB |
| 厂商： | Exar Corporation |
| 文件页数： | 2/49页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR V2551 32QFN |
| 标准包装： | 1 |
| 系列： | * |
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XR16V2551
10
HIGH PERFORMANCE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE
REV. 1.0.3
2.7
DMA Mode
The device does not support direct memory access. The DMA Mode (a legacy term) in this document doesn’t
mean “direct memory access” but refers to data block transfer operation. The DMA mode affects the state of
the RXRDY# A/B and TXRDY# A/B output pins. The transmit and receive FIFO trigger levels provide additional
flexibility to the user for block mode operation. The LSR bits 5-6 provide an indication when the transmitter is
empty or has an empty location(s) for more data. The user can optionally operate the transmit and receive
FIFO in the DMA mode (FCR bit-3=1). When the transmit and receive FIFO are enabled and the DMA mode is
disabled (FCR bit-3 = 0), the V2551 is placed in single-character mode for data transmit or receive operation.
When DMA mode is enabled (FCR bit-3 = 1), the user takes advantage of block mode operation by loading or
unloading the FIFO in a block sequence determined by the selected trigger level. In this mode, the V2551 sets
the TXRDY# pin when the transmit FIFO becomes full, and sets the RXRDY# pin when the receive FIFO
TABLE 3: TXRDY# AND RXRDY# OUTPUTS IN FIFO AND DMA MODE
PINS
FCR BIT-0 = 0
(FIFO DISABLED)
FCR BIT-0 = 1 (FIFO ENABLED)
FCR BIT-3 = 0
(DMA MODE DISABLED)
FCR BIT-3 = 1
(DMA MODE ENABLED)
RXRDY# A/B LOW = 1 byte
HIGH = No data
LOW = At least 1 byte in FIFO
HIGH = FIFO empty
HIGH to LOW transition when FIFO reaches the
trigger level, or time-out occurs
LOW to HIGH transition when FIFO empties
TXRDY# A/B LOW = THR empty
HIGH = Byte in THR
LOW = FIFO empty
HIGH = At least 1 byte in FIFO
LOW = FIFO has at least 1 empty location
HIGH = FIFO is full
2.8
INTA and INTB Outputs
The INTA and INTB interrupt output changes according to the operating mode and enhanced features setup.
Table 4 and 5 summarize the operating behavior for the transmitter and receiver. Also see Figures 19
through 24.
TABLE 4: INTA AND INTB PINS OPERATION FOR TRANSMITTER
FCR BIT-0 = 0
(FIFO DISABLED)
FCR BIT-0 = 1 (FIFO ENABLED)
INTA/B Pin
LOW = A byte in THR
HIGH = THR empty
LOW = FIFO above trigger level
HIGH = FIFO below trigger level or FIFO empty
TABLE 5: INTA AND INTB PIN OPERATION FOR RECEIVER
FCR BIT-0 = 0
(FIFO DISABLED)
FCR BIT-0 = 1
(FIFO ENABLED)
INTA/B Pin
LOW = No data
HIGH = 1 byte
LOW = FIFO below trigger level
HIGH = FIFO above trigger level
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相关代理商/技术参数 |
参数描述 |
|---|---|
| XR16V2551IL32 | 制造商:EXAR 制造商全称:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 16-BYTE FIFO AND POWERSAVE FEATURE |
| XR16V2551IL-F | 功能描述:UART 接口集成电路 UART RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR16V2551ILTR-F | 制造商:Exar Corporation 功能描述:UART 2-CH 16Byte FIFO 2.5V/3.3V 32-Pin QFN EP T/R 制造商:Exar Corporation 功能描述:XR16V2551ILTR-F |
| XR16V2551IM | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: |
| XR16V2551IM-0B-EB | 功能描述:UART 接口集成电路 Supports V2551 48 ld TQFP, PCI Interface RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
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