参数资料
型号: XR16V798IQ-F
厂商: Exar Corporation
文件页数: 15/56页
文件大小: 0K
描述: IC UART FIFO 64B OCTAL 100QFP
标准包装: 66
特点: *
通道数: 8
FIFO's: 64 字节
规程: RS485
电源电压: 2.25 V ~ 3.6 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 100-BQFP
供应商设备封装: 100-QFP(14x20)
包装: 托盘
其它名称: 1016-1647
XR16V798IQ-F-ND
XR16V798
22
HIGH PERFORMANCE 2.25V TO 3.6V OCTAL UART WITH FRACTIONAL BAUD RATE
REV. 1.0.1
3.1.1
The Global Interrupt Source Registers
The XR16V798 has a global interrupt source register set that consists of 4 consecutive registers [INT0, INT1,
INT2 and INT3]. The four registers are in the device configuration register address space.
All four registers default to logic zero (as indicated in square braces) for no interrupt pending. All 8 channel
interrupts are enabled or disabled in each channel’s IER register. INT0 shows individual status for each
channel while INT1, INT2 and INT3 show the details of the source of each channel’s interrupt with its unique 3-
bit encoding. Figure 13 shows the 4 interrupt registers in sequence for clarity. The 16-bit timer and sleep
wake-up interrupts are masked in the device configuration registers, TIMERCNTL and SLEEP. An interrupt is
generated (if enabled) by the 798 when awakened from sleep if all 8 channels were placed in the sleep mode
previously.
Each bit gives an indication of the channel that has requested for service. For example, bit-0 represents
channel 0 and bit-7 indicates channel 7. Logic one indicates the channel N [7:0] has called for service. The
interrupt bit clears after reading the appropriate register of the interrupting UART channel register (ISR, LSR
and MSR). SEE”INTERRUPT CLEARING:” ON PAGE 32. for interrupt clearing details.
TABLE 8: DEVICE CONFIGURATION REGISTERS
ADDRESS
[A7:A0]
READ/
WRITE
REGISTER
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0x80
R
INT Source
UART 7
UART 6
UART 5
UART 4
UART 3
UART 2
UART 1
UART 0
0x81
R
INT 1
UART 2
bit 1
source
bit 0
UART 1
bit 2
interrupt
bit 1
source
bit 0
UART 0
bit 2
interrupt
bit 1
source
bit 0
0x82
R
INT 2
UART 5
bit 0
UART 4
bit 2
interrupt
bit 1
source
bit 0
UART 3
bit 2
interrupt
bit 1
source
bit 0
UART 2
bit 2
0x83
R
INT 3
UART 7
bit 2
interrupt
bit 1
source
bit 0
UART 6
bit 2
interrupt
bit 1
source
bit 0
UART 5
bit 2
source
bit 1
0x84
R/W
TIMER
CTRL
0
clock
source
function
select
start timer
enable
timer INT
0x85
R
TIMER
0
0x86
R/W
TIMER LSB
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x87
R/W
TIMER MSB
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x88
R/W
8X MODE
UART 7
UART 6
UART 5
UART 4
UART 3
UART 2
UART 1
UART 0
0x89
R
REGA
0
0x8A
W
RESET
Reset
UART 7
Reset
UART 6
Reset
UART 5
Reset
UART 4
Reset
UART 3
Reset
UART 2
Reset
UART 1
Reset
UART 0
0x8B
R/W
SLEEP
Enable
sleep
UART 7
Enable
sleep
UART 6
Enable
sleep
UART 5
Enable
sleep
UART 4
Enable
sleep
UART 3
Enable
sleep
UART 2
Enable
sleep
UART 1
Enable
sleep
UART 0
0x8C
R
DREV
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
0x8D
R
DVID
0
1
0
1
0
0x8E
R/W
REGB
0
write to all
UARTs
INT3
[0x00]
INT2
[0x00]
INT1
[0x00]
INT0
[0x00]
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