参数资料
型号: XR17C158IV-F
厂商: Exar Corporation
文件页数: 13/67页
文件大小: 0K
描述: IC UART PCI BUS OCTAL 144LQFP
标准包装: 60
特点: *
通道数: 8
FIFO's: 64 字节
规程: RS485
电源电压: 4.5 V ~ 5.5 V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
其它名称: 1016-1646
XR17C158IV-F-ND
XR17C158
xr
5V PCI BUS OCTAL UART
REV. 1.4.3
20
REGB [23:16] (default 0x00)
REGB register provides a control for simultaneous write to all 8 UARTs configuration register or individually.
This is very useful for device initialization during power-up and reset routines. Also, the register provides a
facility to interface to the non-volatile memory device such as a 93C46 EEPROM. In embedded applications,
the user can use this facility to store proprietary data.
1.2.9
Multi-Purpose Inputs and Outputs
The 158 provides 8 multi-purpose inputs/outputs [MPIO7:0] for general use. Each pin can be programmed to
be an input or output function. The input logic state can be set for normal or inverted level, and optionally set to
generate an interrupt. The outputs can be set to be normal logic 1 or 0 state, or 3-state. Their functions and
definitions are programmed through 5 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV and MPIOSEL. If all
8 pins are set for inputs, all 8 interrupts would be OR’ed together. The OR’ed interrupt is reported in the
channel 0 UART interrupt status (3-bit interrupt encoding, bits [10:8], in the global interrupt status register).
SEE”THE INTERRUPT STATUS REGISTER” ON PAGE 15. The pins may also be programmed to be outputs
and to the 3-state condition for signal sharing.
1.2.10
MPIO REGISTER
Bit 7 represents MPIO7 pin and bit 0 represents MPIO0 pin. There are 5 registers that select, control and
monitor the 8 multipurpose inputs and outputs. Figure 6 shows the internal circuitry.
1.2.8
REGB Register
REGB[16](Read/Write)
Logic 0 (default) write to each UART configuration registers individually.
Logic 1 enables simultaneous write to all 8 UARTs configuration register.
REGB[19:17]
Reserved
REGB[20] (Write-Only)
Control the EECK, clock, output (pin 116) on the EEPROM interface.
REGB[21] (Write-Only)
Control the EECS, chips select, output (pin 115) to the EEPROM device.
REGB[22] (Write-Only)
EEDI (pin 114) data input. Write data to the EEPROM device.
REGB[23] (Read-Only)
EEDO (pin 113) data output. Read data from the EEPROM device.
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