参数资料
型号: XR17D152CMTR-F
厂商: Exar Corporation
文件页数: 62/68页
文件大小: 0K
描述: IC UART PCI BUS DUAL 100TQFP
标准包装: 1,000
特点: *
通道数: 2,DUART
FIFO's: 64 字节
规程: RS485
电源电压: 3.3V,5V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 100-TQFP
供应商设备封装: 100-TQFP(14x14)
包装: 带卷 (TR)
á
XR17D152
REV. 1.2.0
UNIVERSAL (3.3V AND 5V) PCI BUS DUAL UART
65
NOTICE
EXAR Corporation reserves the right to make changes to the products contained in this publication in order to
improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any
circuits described herein, conveys no license under any patent or other right, and makes no representation that
the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration
purposes and may vary depending upon a user’s specific application. While the information in this publication
has been carefully checked; no responsibility, however, is assumed for inaccuracies.
EXAR Corporation does not recommend the use of any of its products in life support applications where the
failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to
significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless
EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has
been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately
protected under the circumstances.
Copyright 2004 EXAR Corporation
Datasheet June 2004.
Send your UART technical inquiry with technical details to hotline: uarttechsupport@exar.com.
Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
REVISION HISTORY
DATE
REVISION
DESCRIPTION
May 2003
Rev. 1.0.0
Final Production Release. Clarified the DC and AC Electrical Characteristics.
Updated requirements for Sleep Mode.
July 2003
Rev. 1.1.0
Added Device Status to Ordering Information.
June 2004
Rev 1.2.0
Clarified pin descriptions- changed from using logic 1 and logic 0 to HIGH (VCC)
and LOW (GND) for input and output pin descriptions. Clarified Auto RS485 and
Sleep Mode description. Added timing diagram for external clock input at XTAL1
pin (Figure 19) and TECLK, TECH, and TECL to AC Electrical Specifications. The
Device Revision Register (DREV) has been updated to 0x02 for devices with top
mark date code "B2 YYWW".
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