参数资料
| 型号： | XR17V254IV-F |
| 厂商： | Exar Corporation |
| 文件页数： | 15/70页 |
| 文件大小： | 0K |
| 描述： | IC UART PCI BUS QUAD 144LQFP |
| 标准包装： | 60 |
| 特点： | * |
| 通道数： | 4，QUART |
| FIFO's： | 64 字节 |
| 规程： | RS485 |
| 电源电压： | 3.3V，5V |
| 带自动流量控制功能： | 是 |
| 带IrDA 编码器/解码器： | 是 |
| 带故障启动位检测功能： | 是 |
| 带调制解调器控制功能： | 是 |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
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XR17V254
22
66MHZ PCI BUS QUAD UART WITH POWER MANAGEMENT SUPPORT
REV. 1.0.1
1.6.6
SLEEP [31:24] (default 0x00)
The 8-bit Sleep register enables each UART separately to enter Sleep mode. Sleep mode reduces power
consumption when the system needs to put the UART(s) to idle. The UART enters sleep mode when the
following conditions are satisfied after the sleep mode is enabled (LOW (default) is to disable and logic HIGH is
to enable sleep mode):
■ There is no pending interrupt
■ RX pin is idling at a HIGH in normal mode or a LOW in infrared mode
■ The modem inputs (CTS#, DSR#, CD# and RI#) are steady at either HIGH or LOW (MSR bits [3:0] =
0000)
When all 4 UART channels are put to sleep, the on-chip oscillator shuts off to further conserve power. In this
case, the V254 is awakened by any of the following events occurring at any of the 4 UART channels:
■ A receive data start bit transition (HIGH to LOW in normal mode or from LOW to HIGH in infrared mode)
■ A data byte is loaded into the transmitter
■ A change of logic state on any of the modem inputs, i.e. any of the delta bits (MSR bits[7:4]) is set
The V254 is ready after 32 crystal clocks to ensure full functionality. Therefore, if the V254 is awakened by a
receive data start bit transition, that character (and the subsequent few characters) may not be received
correctly. Also, a special interrupt is generated with an indication of no pending interrupt. The V254 will return
to sleep mode automatically after all interrupting conditions have been serviced and cleared. It will stay in the
sleep mode of operation until it is disabled by resetting the SLEEP register bits.
1.6.7
Device Identification and Revision
There are two internal registers that provide device identification and revision, DVID and DREV registers. The
8-bit content in the DVID register provides device identification. A return value of 0x44 from this register
indicates the device is a XR17V254. The DREV register returns an 8-bit value of 0x01 for revision A with 0x02
equals to revision B and so on. This information is very useful to the software driver for identifying which device
it is communicating with and to keep up with revision changes.
DVID [15:8]
Device identification for the type of UART. The Device ID of the XR17V254 is 0x44.
DREV [7:0]
Revision number of the XR17V254. A 0x01 represents "revision-A" with 0x02 for rev-B and so on.
SLEEP Register
Individual UART Channel Sleep Enable
Bit-7 Bit-6 Bit-5 Bit-4 Bit-3 Bit-2 Bit-1 Bit-0
Rsvd
Ch-3 Ch-2 Ch-1 Ch-0
Rsvd Rsvd Rsvd
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