参数资料
型号: XR17V258IV
厂商: Exar Corporation
文件页数: 18/69页
文件大小: 0K
描述: IC UART PCI BUS OCTAL 144LQFP
产品变化通告: Leaded UART, V&I Obsolescence 11/Apr/2011
标准包装: 60
特点: *
通道数: 8
FIFO's: 64 字节
规程: RS485
电源电压: 3.3V,5V
带自动流量控制功能:
带IrDA 编码器/解码器:
带故障启动位检测功能:
带调制解调器控制功能:
安装类型: 表面贴装
封装/外壳: 144-LQFP
供应商设备封装: 144-LQFP(20x20)
包装: 托盘
1.6.8
REGB Register
REGB[16](Read/Write)
Logic 0 (default) write to each UART configuration registers individually.
Logic 1 enables simultaneous write to all 8 UARTs configuration register.
REGB[19:17]
Reserved
REGB[20] (Write-Only)
Control the EECK, clock, output (pin 116) on the EEPROM interface.
REGB[21] (Write-Only)
Control the EECS, chips select, output (pin 115) to the EEPROM device.
REGB[22] (Write-Only)
EEDI (pin 114) data input. Write data to the EEPROM device.
REGB[23] (Read-Only)
EEDO (pin 113) data output. Read data from the EEPROM device.
XR17V258
25
REV. 1.0.2
66MHZ PCI BUS OCTAL UART WITH POWER MANAGEMENT SUPPORT
1.6.9
Multi-Purpose Inputs and Outputs
The V258 provides 8 multi-purpose inputs/outputs MPIO[7:0] for general use. Each pin can be programmed to
be an input or output function. The input logic state can be set for normal or inverted level, and optionally set to
generate an interrupt. The outputs can be set to be normal HIGH or LOW state, or 3-state. Their functions and
definitions are programmed through 5 registers: MPIOINT, MPIOLVL, MPIO3T, MPIOINV and MPIOSEL. If all
8 pins are set for inputs, all 8 interrupts would be ORed together. The ORed interrupt is reported in the channel
0 UART interrupt status, see Interrupt Status Register. The pins may also be programmed to be outputs and to
the 3-state condition for signal sharing. The MPIO[0] pin can be programmed to show the Timer output. When
it is programmed to be the Timer output, all the above 5 registers lose control over the MPIO[0] pin. For details
1.6.10
MPIO REGISTERS
There are 5 registers that select, control and monitor the 8 multipurpose inputs and outputs. Figure 9 shows
the internal circuitry.
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