- 您现在的位置：买卖IC网 > PDF目录16472 > XR68M752IB-0A-EVB (Exar Corporation)EVAL BOARD FOR 68M752 49BGA PDF资料下载
参数资料
| 型号： | XR68M752IB-0A-EVB |
| 厂商： | Exar Corporation |
| 文件页数： | 19/54页 |
| 文件大小： | 0K |
| 描述： | EVAL BOARD FOR 68M752 49BGA |
| 标准包装： | 1 |
| 系列： | * |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页
XR16M752/XR68M752
26
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
REV. 1.1.1
4.0 INTERNAL REGISTER DESCRIPTIONS
4.1
Receive Holding Register (RHR) - Read- Only
4.2
Transmit Holding Register (THR) - Write-Only
4.3
Interrupt Enable Register (IER) - Read/Write
The Interrupt Enable Register (IER) masks the interrupts from receive data ready, transmit empty, line status
and modem status registers. These interrupts are reported in the Interrupt Status Register (ISR).
4.3.1
IER versus Receive FIFO Interrupt Mode Operation
When the receive FIFO (FCR BIT-0 = 1) and receive interrupts (IER BIT-0 = 1) are enabled, the RHR interrupts
(see ISR bits 2 and 3) status will reflect the following:
A. The receive data available interrupts are issued to the host when the FIFO has reached the programmed
trigger level. It will be cleared when the FIFO drops below the programmed trigger level.
B. FIFO level will be reflected in the ISR register when the FIFO trigger level is reached. Both the ISR register
status bit and the interrupt will be cleared when the FIFO drops below the trigger level.
C. The receive data ready bit (LSR BIT-0) is set as soon as a character is transferred from the shift register to
the receive FIFO. It is reset when the FIFO is empty.
Baud Rate Generator Divisor
0 0 0
DLL RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=1
LCR
≠0xBF
0 0 1
DLM RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
0 1 0
DLD RD/WR IR Mode
Auto
RS485
Direction
Control
4X Mode 8X Mode
Bit-3
Bit-2
Bit-1
Bit-0
LCR[7]=1
LCR
≠0xBF
EFR[4]=1
Enhanced Registers
0 1 0
EFR RD/WR
Auto
CTS
Enable
Auto RTS
Enable
Special
Char
Select
Enable
IER [7:4],
ISR [5:4],
FCR[5:4],
MCR[7:5],
DLD
Soft-
ware
Flow
Cntl
Bit-3
Soft-
ware
Flow
Cntl
Bit-2
Soft-
ware
Flow
Cntl
Bit-1
Soft-
ware
Flow
Cntl
Bit-0
LCR=0XBF
1 0 0
XON1 RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1 0 1
XON2 RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1 1 0
XOFF
1
RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
1 1 1
XOFF
2
RD/WR
Bit-7
Bit-6
Bit-5
Bit-4
Bit-3
Bit-2
Bit-1
Bit-0
TABLE 8: INTERNAL REGISTERS DESCRIPTION. SHADED BITS ARE ENABLED WHEN EFR BIT-4=1
ADDRESS
A2-A0
REG
NAME
READ/
WRITE
BIT-7
BIT-6
BIT-5
BIT-4
BIT-3
BIT-2
BIT-1
BIT-0
COMMENT
相关PDF资料 |
PDF描述 |
|---|---|
| A3967SLBTR | IC MOTOR DRIVER PWM FULL 24SOIC |
| VI-202-EX | CONVERTER MOD DC/DC 15V 75W |
| EB83-S0D1840V | CONN EDGEBOARD DUAL 36POS 5A |
| ECM22DRMI-S288 | CONN EDGECARD 44POS .156 EXTEND |
| VI-201-EX | CONVERTER MOD DC/DC 12V 75W |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XR68M752IB-0B-EVB | 功能描述:界面开发工具 Eval Board for XR68M752IB Series RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| XR68M752IB49 | 制造商:EXAR 制造商全称:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO |
| XR68M752IB49-F | 功能描述:UART 接口集成电路 W/64 BYTE FIFO RoHS:否 制造商:Texas Instruments 通道数量:2 数据速率:3 Mbps 电源电压-最大:3.6 V 电源电压-最小:2.7 V 电源电流:20 mA 最大工作温度:+ 85 C 最小工作温度:- 40 C 封装 / 箱体:LQFP-48 封装:Reel |
| XR68M752IL-0B-EB | 功能描述:界面开发工具 Support XR68M752 32L QFN, PCI Interface RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| XR68M752IL32 | 制造商:EXAR 制造商全称:EXAR 功能描述:HIGH PERFORMANCE DUART WITH 64-BYTE FIFO |
发布紧急采购，3分钟左右您将得到回复。