参数资料
型号: XRT83SL216IB
厂商: Exar Corporation
文件页数: 17/42页
文件大小: 0K
描述: IC LIU SH E1 16CH 289STBGA
标准包装: 84
类型: 线路接口装置(LIU)
驱动器/接收器数: 16/16
规程: T1,E1,J1
电源电压: 3.135 V ~ 3.465 V
安装类型: 表面贴装
封装/外壳: 289-LFBGA
供应商设备封装: 289-STBGA(15x15)
包装: 托盘
XRT83SL216
22
16-CHANNEL E1 SHORT-HAUL LINE INTERFACE UNIT
REV. 1.0.0
3.0
APPLICATIONS
This applications section describes system considerations along with references to application notes available
for reference where applicable.
3.1
Loopback Diagnostics
The XRT83SL216 supports several loopback modes for diagnostic testing. The following section describes the
local analog loopback, remote loopback, and digital loopback.
3.1.1
Local Analog Loopback
With local analog loopback activated, the transmit output data at TTIP/TRING is internally looped back to the
analog inputs at RTIP/RRING. External inputs at RTIP/RRING are ignored while valid transmit output data
continues to be sent to the line. A simplified block diagram of local analog loopback is shown in Figure 15.
FIGURE 15. SIMPLIFIED BLOCK DIAGRAM OF LOCAL ANALOG LOOPBACK
NOTE: TAOS takes priority over the transmit input data at TPOS/TNEG.
3.1.2
Remote Loopback
With remote loopback activated, the receive input data at RTIP/RRING is internally looped back to the transmit
output data at TTIP/TRING. The transmit input data at TCLK/TPOS/TNEG are ignored while valid receive
output data continues to be sent to the system. A simplified block diagram of remote loopback is shown in
FIGURE 16. SIMPLIFIED BLOCK DIAGRAM OF REMOTE LOOPBACK
NOTE: Remote Loop Back takes priority over TAOS.
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
Tx
TAOS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
Rx
Encoder
Decoder
Timing
Control
Data and
Clock
Recovery
JA
Tx
Rx
TAOS
TTIP
TRING
RTIP
RRING
TCLK
TPOS
TNEG
RCLK
RPOS
RNEG
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