XRT83SL38IB (Exar) PDF资料下载 Datasheet(41/88 页)

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参数资料

型号：	XRT83SL38IB
厂商：	Exar Corporation
文件页数：	41/88页
文件大小：	0K
描述：	IC LIU SH T1/E1/J1 OCTAL 225BGA
标准包装：	84
类型：	线路接口装置（LIU）
驱动器/接收器数：	8/8
规程：	T1，E1，J1
电源电压：	3.135 V ~ 3.465 V
安装类型：	表面贴装
封装/外壳：	225-BGA
供应商设备封装：	225-BGA（19x19）
包装：	托盘

XRT83SL38

OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR

REV. 1.0.2

In the Remote Loop-Back mode if the jitter attenuator is selected in the transmit path, the receive data from the

Clock and Data Recovery block is looped back to the transmit path and is applied to the jitter attenuator using

RCLK as transmit timing. In this mode the transmit clock and data are also ignored, while RCLK and received

data will continue to be available at their respective output pins. Remote Loop-Back with the jitter attenuator

selected in the transmit path is shown in Figure 19.

DIGITAL LOOP-BACK (DLOOP)

Digital Loop-Back or Local Loop-Back allows the transmit clock and data to be looped back to the

corresponding receiver output pins through the encoder/decoder and jitter attenuator. In this mode, receive

data and clock are ignored, but the transmit data will be sent to the line uninterrupted. This loop back feature

allows users to configure the line interface as a pure jitter attenuator. The Digital Loop-Back signal flow is

shown in Figure 20.

FIGURE 19. REMOTE LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH

FIGURE 20. DIGITAL LOOP-BACK MODE WITH JITTER ATTENUATOR SELECTED IN TRANSMIT PATH

Decoder

Timing

Control

Clock &

Data

Recovery

TPOS

TNEG

TCLK

RCLK

RPOS

RNEG

Encoder

TTIP

TRING

RTIP

RRING

Decoder

Timing

Control

Data &

Clock