参数资料
| 型号： | XRT83SL38IB |
| 厂商： | Exar Corporation |
| 文件页数： | 68/88页 |
| 文件大小： | 0K |
| 描述： | IC LIU SH T1/E1/J1 OCTAL 225BGA |
| 标准包装： | 84 |
| 类型： | 线路接口装置（LIU） |
| 驱动器/接收器数： | 8/8 |
| 规程： | T1，E1，J1 |
| 电源电压： | 3.135 V ~ 3.465 V |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 225-BGA |
| 供应商设备封装： | 225-BGA（19x19） |
| 包装： | 托盘 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页当前第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页
XRT83SL38
68
OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. 1.0.2
CLOCK SELECT REGISTER
The input clock source is used to generate all the necessary clock references internally to the LIU. The
microprocessor timing is derived from a PLL output which is chosen by programming the Clock Select Bits and
the Master Clock Rate in register 0x81h. Therefore, if the clock selection bits or the MCLRATE bit are being
programmed, the frequency of the PLL output will be adjusted accordingly.
During this adjustment, it is
important to "Not" write to any other bit location within the same register while selecting the input/output clock
frequency. For best results, register 0x81h can be broken down into two sub-registers with the MSB being bits
D[7:3] and the LSB being bits D[2:0] as shown in Figure 22. Note: Bit D[7] is a reserved bit.
FIGURE 22. REGISTER 0X81H SUB REGISTERS
Programming Examples:
Example 1: Changing bits D[7:3]
If bits D[7:3] are the only values within the register that will change in a WRITE process, the microprocessor
only needs to initiate ONE write operation.
Example 2: Changing bits D[2:0]
If bits D[2:0] are the only values within the register that will change in a WRITE process, the microprocessor
only needs to initiate ONE write operation.
Example 3: Changing bits within the MSB and LSB
In this scenario, one must initiate TWO write operations such that the MSB and LSB do not change within ONE
write cycle. It is recommended that the MSB and LSB be treated as two independent sub-registers. One can
either change the clock selection (MSB) and then change bits D[2:0] (LSB) on the SECOND write, or vice-
versa. No order or sequence is necessary.
D0
D1
D2
D3
D4
D5
D6
D7
MSB
LSB
Clock Selection Bits
ExLOS, ICT
相关PDF资料 |
PDF描述 |
|---|---|
| MS27472T10B35SC | CONN RCPT 13POS WALL MNT W/SCKT |
| XRT75R03IVTR-F | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| VE-21W-MX-F4 | CONVERTER MOD DC/DC 5.5V 75W |
| XRT75R03IVTR | IC LIU E3/DS3/STS-1 3CH 128LQFP |
| MS27472T10B35SB | CONN RCPT 13POS WALL MNT W/SCKT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| XRT83SL38IB-F | 功能描述:时钟合成器/抖动清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| XRT83SL38IV | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83VL38 | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
| XRT83VL38ES | 功能描述:界面开发工具 Eval System for XRT83L38 Series RoHS:否 制造商:Bourns 产品:Evaluation Boards 类型:RS-485 工具用于评估:ADM3485E 接口类型:RS-485 工作电源电压:3.3 V |
| XRT83VL38IB | 制造商:EXAR 制造商全称:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR |
发布紧急采购，3分钟左右您将得到回复。