参数资料
型号: YDA147
元件分类: 音频/视频放大
英文描述: 20 W, 2 CHANNEL, AUDIO AMPLIFIER, PQFP48
封装: LEAD FREE, PLASTIC, SQFP-48
文件页数: 34/36页
文件大小: 1264K
代理商: YDA147
YDA147
CATALOG No.:LSI-4DA147A61
7
■Functional Description
● Digital Amplifier Function
YDA147 has digital amplifiers with analog input, PWM pulse output, the maximum output of 20W × 2ch.
Adopting “Pure Pulse Direct Speaker Drive Circuit” reduces distortion and noise on PWM pulse output signal.
·Digital Amplifier Gain
The total gain of the digital amplifier varies depending on operation modes, as shown below.
NCDRC1
NCDRC0
GAIN1
GAIN0
Total Gain
Operation Mode
L
+22dB
L
H
+28dB
H
L
+34dB
L
H
+16dB
Normal mode
Non-clip: OFF
DRC: OFF
L
+34dB
L
H
+40dB
H
L
+46dB
L
H
+28dB
Non-clip mode
L
+34dB
L
H
+40dB
H
L
+46dB
H
L
H
+28dB
DRC1 mode
L
+34dB
L
H
+40dB
H
L
+46dB
H
+28dB
DRC2 mode
·
Audio Signal Input
For a differential input, the signal should be input to INLP and INLM terminals (Lch) and to INRP and INRM terminals
(Rch) through a DC-cut capacitor (CIN).
On the contrary, for a single-ended input, the signal should be input to INLP terminal (Lch) and to INRP terminal (Rch)
through a DC-cut capacitor (CIN). At this time, INLM and INRM terminals should be connected to AVSS through DC-cut
capacitors (CIN) with the same value.
In the differential input mode, use signal sources with the same impedance to reduce pop-noise. Its value should be 10k or
less. Use a DC-cut capacitor (CIN) of 1F. (The capacitance value should be less than 1.5F throughout the operating
temperature range.)
(Cautions)
When inputting audio signals in Power-off state ( PVDD < VHUVLL ) or Sleep state, current may flow toward the former
device from YDA147's ground, through each protection circuit of analog pins (INLP, INLM, INRP, and INRM).
For this reason, audio signals should not be input in Power-off state ( PVDD < VHUVLL ) or Sleep state.
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