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参数资料
| 型号： | YGV628B-VZ |
| 元件分类： | 显示控制器 |
| 英文描述： | 800 X 600 PIXELS CRT GRPH DSPL CTLR, PQFP176 |
| 封装： | LEAD FREE, PLASTIC, LQFP-176 |
| 文件页数： | 20/26页 |
| 文件大小： | 626K |
| 代理商： | YGV628B-VZ |
YGV628B
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■
■ B
Bllo
oc
ck
k D
Diia
ag
gr
ra
am
m
Monitor I/F
R, G, B
DBO5
IREF
CSYNC_N
VSYNC_N
BLANK_N
GCK1OUT
GCK2OUT
Registers
To all blocks
Clock
SYCKIN
Video Memory I/F
Video Input I/F
DRI[5:0]
DGI[5:0]
DBI[5:0]
HSIN_N
VSIN_N
GCK1IN
GCK2IN
DAC
Monitor I/F
R, G, B
DRO5-0
DGO5-0
DBO5-0
IREF
CSYNC_N
VSYNC_N
BLANK_N
GCK1OUT
GCK2OUT
CRTC
DMA
Control
Color Palette
Registers
To all blocks
CPU Interface
Clock
SYCKIN
Video Memory I/F
PRIORITY
ENC.
Video Input I/F
DRI[5:0]
DGI[5:0]
DBI[5:0]
HSIN_N
VSIN_N
GCK1IN
GCK2IN
Vide
oM
em
or
yI
nte
rfa
ce
Bitmap
FIFO
Data
FORMAT
CONV.
FILTER
Vide
oC
apt
ur
e
C
on
tro
lle
r
Vide
oI
np
utI
nte
rfa
ce
Data
FORMAT
CONV.
To Clock Gen.
To CRTC
Alpha
Blending
Data
FORMAT
CONV.
DAC
Clock Gen.
CPU I/F
WRH_N
WRL_N
RD_N
WAIT_N
INT_N
DREQ_N
CPU I/F
D[15:0]
A[23:1]
CS_N
READY_N
RESET_N
SA[13:0]
SCS_N
RAS_N
CAS_N
WE_N
UDQM
LDQM
SDCKOUT
SDQ[15:0]
■
■ E
Ex
xa
am
mp
plle
ess o
off S
Sy
ysstte
em
m C
Co
om
mp
po
ossiittiio
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n
Independent (self-propelled) system
AVDP7
ROM
RAM
CPU
Dot clock
SDRAM
CRT
LCD
Encoder
Analog RGB
Digital RGB
Example of OSD to Digital Image (CPU, SDRAM, etc. are omitted)
AVDP7
DAC NTSC Encoder
Image + OSD
External Image
[16bitYCrCb]
[ITU656]
[16bitYCrCb]
[ITU656]
Separate
Composite
Component
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参数描述 |
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