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参数资料
| 型号： | YSS912C |
| 厂商： | Yamaha Corporation |
| 英文描述： | One chip LSI Consisting of Dolby Digital (AC-3) / Pro Logic decoder amd Sub DSP(含杜比系统（AC-3）/前置逻辑译码器和声音处理DSP的集成电路) |
| 中文描述： | 一个芯片LSI，杜比数字组成（交流- 3）/定向逻辑解码器的AMD小组的DSP（含杜比系统（交流- 3）/前置逻辑译码器和声音处理数字信号处理器的集成电路） |
| 文件页数： | 11/14页 |
| 文件大小： | 142K |
| 代理商： | YSS912C |
YSS912C
6
FUNCTION DESCRIPTION
The YSS912C consist of Main DSP section where AC-3/Pro Logic/DTS decoding is executed and Sub DSP
section where various sound field effects are added. Please refer to “BLOCK DIAGRAM” section.
Sub DSP is a 8 ch input / 8 ch output programmable DSP exclusively for the sound field processing. It can apply
such effects as virtual surround, echo and equalizing. In addition, with an SRAM up to 1Mbit connected, it can
produce reverberation for one second or longer. By using this function, it is possible to simulate various sound
fields such as a hall or a church.
* If adopting some technology owned by another company is desired for use in Sub DSP section, note that a separate
contract may be required between the owner of that technology and the user with respect to adoption of the
technology.
1. Clocks
XI, XO, CPO
The crystal oscillation circuit is formed by using XI and XO terminals.
Connect a crystal of 12.288 MHz between XI and XO terminals.
Connect an external analog filter between CPO terminal and Ground.
2. Data Interface
SDIA0, SDIA1, SDOA0-2, SDIB0-3, SDOB0-3, SDWCK0, SDBCK0,
SDWCK1, SDBCK1, /SDBCK0
Main DSP section
AC-3/PCM/DTS data should be fed from SDIA0 or SDIA1 terminal.
These signals are processed by AC-3/Pro Logic/DTS decoding procedure in Main DSP section and then
transmitted to Sub DSP section as well as outputted through SDOA0-2 terminals.
Sub DSP section
In Sub DSP section, various types of processing can be applied to the PCM data decoded in Main DSP section or
inputted through SDIB0-3 terminals. Then, processed signals are outputted from each of SDOB0-3 terminals.
Following parameters can be selected by changing the control register setting.
. Selection of Main DSP input signal (SDIA0, SDIA1)
. Selection of Sub DSP input signal (Main DSP output, SDIB0-3 input)
. Polarity of bit clock and word clock
. Format and bit count of input/output data
For more information on the format of the input/output data, please refer to “Serial Data Interface” section.
3. Microprocessor Interface
/CS, /CSB, SCK, SI, SO
The control registers can be read/written via the serial microprocessor interface by using /CS, SCK, SI, and SO
terminals.
Please refer to the following format diagram for the details of read/write timing.
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| YSS915-MZ | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
| YSS915-M | 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDSO28 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| YSS912F | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Consumer IC |
| YSS915 | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Karaoke Processor 2 for Video disc player |
| YSS915-M | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Consumer IC |
| YSS920B | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:32位DSP引擎的各种声音效果 |
| YSS932 | 制造商:YAMAHA 制造商全称:YAMAHA CORPORATION 功能描述:96kHz DIR + Dolby Digital / Pro Logic II / DTS decoder + Sub DSP |
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