参数资料
型号: YSS912F
英文描述: Stratix GX FPGA 25K 16-FBGA
中文描述: 消费性IC
文件页数: 11/32页
文件大小: 802K
代理商: YSS912F
YSS915
19
-
5)
DAR($04) : Control of digital audio I/O format
bit
Function
Default Controllable
mode
0
Selecting digital audio output data word length
“b1 b0”
“ 0
0 ” = 16 bits
0
1
“ 0 1 ” = 18 bits
“ 1 0 ” = 20 bits
“ 1 1 ” = 24 bits
0
E
2
This function is valid when bit 5 of OPR($00) = 0. When this bit = 1, the digital
audio output synchronizes with internal clock (64 fs).
“b3 b2”
0
3
“ 0
0 ” = Synchronizing with internal clock (64 fs)
“ 0
1 ” = Synchronizing with BCI (64 fs)
“ 1
0 ” = Synchronizing with BCI (48 fs)
“ 1
1 ” = Synchronizing with BCI (32 fs)
0
E
4
Selecting digital audio input data word length
“b5 b4”
“ 0
0 ” = 16bit
0
5
“ 0 1 ” = 18bit
“ 1 0 ” = 20bit
“ 1 1 ” = 24bit
0
E
6
Selecting an output to digital audio output terminal (BCO, L/R and DO)
“b7 b6”
“ 0
0 ” = Normal (Internally processed data are outputted.)
0
7
“ 0 1 ” = BCO, L/R and DO are fixed to "L".
“ 1
0 ” = BCI, SDDY and DI are thru-outputted.
(For the details, refer to 4-5 in Page 9.)
“ 1 1 ” = Inhibited
0
E
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