参数资料
| 型号： | ZL2101ALAFTK |
| 厂商： | Intersil |
| 文件页数： | 8/27页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 1,000 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 36-QFN（6x6） |
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ZL2101
Electrical Specifications V DDP = V DDS = 12V, T A = -40°C to +85°C unless otherwise noted. (Note 10) Typical values are at T A = +25°C.
Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)
MIN
MAX
PARAMETER
VSEN Undervoltage Threshold
VSEN Overvoltage Threshold
CONDITIONS
Factory default
Configurable via I 2 C/SMBus
Factory default
(Note 20)
-
0
-
TYP
85
-
115
(Note 20)
-
110
-
UNIT
% V OUT
% V OUT
% V OUT
VSEN Undervoltage Hysteresis
Configurable via I 2 C/SMBus
0
-
-
5
115
-
% V OUT
% V OUT
VSEN Undervoltage/Overvoltage Fault Response
Time
Peak Current Limit Threshold
Factory default
Configurable via I 2 C/SMBus
Factory default
-
5
-
16
-
-
-
60
9.0
μs
μs
A
Current Limit Set-point Accuracy
Configurable via I 2 C/SMBus
0.2
-
-
±10
9.0
-
A
% FS
(Note 12)
Current Limit Protection Delay
Factory default
-
5
-
t SW
(Note 19)
Configurable via I 2 C/SMBus
Thermal Protection Threshold (Junction Temperature) Factory default
1
-
-
125
32
-
t SW
(Note 19)
°C
Thermal Protection Hysteresis
Configurable via
I 2 C/SMBus
-40
-
-
15
125
-
°C
°C
NOTES:
10. Refer to Safe Operating Area in Figure 8 and thermal design guidelines in AN2010.
11. Does not include margin limits.
12. Percentage of Full Scale (FS) with temperature compensation applied.
13. The device requires a delay period following an enable signal and prior to ramping its output. Precise timing mode limits this delay period to
approximately 2ms, where in normal mode it may vary up to 4ms.
14. Precise ramp timing mode is only valid when using EN pin to enable the device rather than PMBus enable. Precise ramp timing mode is automatically
15. The devices may require up to a 4ms delay following the assertion of the enable signal (normal mode) or following the
de-assertion of the enable signal. Precise mode requires Re-Enable delay = T OFF +T FALL +10μs.
16. Switch node current should not exceed I RMS of 6A.
17. Factory default is the initial value in firmware. The value can be changed via PMBus commands.
18. Maximum duty cycle is limited by the equation MAX_DUTY(%) = [1 - (150×10 -9 × f SW )] × 100 and not to exceed 95%.
19. t SW = 1/f SW , where f SW is the switching frequency.
20. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
8
FN7730.0
January 23, 2012
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