参数资料
型号: ZL6100ALAFT
厂商: Intersil
文件页数: 8/34页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM VM 36-QFN
标准包装: 4,000
PWM 型: 电压模式
输出数: 1
频率 - 最大: 1.4MHz
占空比: 95%
电源电压: 3 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 36-VFQFN 裸露焊盘
包装: 带卷 (TR)
ZL6100
F.B
(Note 1).
V IN 12V
C IN
ENABLE
POWER GOOD OUTPUT
DDC Bus
(Note 3)
C V25
10μF
4V
4.7μF
25V
3 x 10μF
25V
QH
DB
BAT54
1μF
16V
V25
1 DGND
2 SYNC
VDD 27
BST 26
CB
3 SA0
4 SA1
GH 25
SW 24
L OUT
V OUT
5 ILIM0
ZL6100
PGND 23
2.2μH
I 2 C/SMBus
(Note 2)
6 ILIM1
7 SCL
8 SDA
9 SALRT
GL 22
VR 21
ISENA 20
ISENB 19
C OUT
2 x 47μF
6.3V
QL
470μF
2.5V
POS-CAP
2*220μF
6.3V
100m
N o te s :
Notes:
EPAD
C VR
4.7μF
6.3V
Ground unification
RTN
1 . F er rite be a d is o p tio n a l fo r in pu t n ois e s up p re s s io n
2 . T he I 2 C /S M B 3. The DDC bus requires a pull-up resistor. The resistance will vary based on the capacitive loading of the bus (and on the number of devices
u s re q u ire s pu ll- up re s is to rs . P le as e re fe r to th e I 2 C /S M B u s s p ec ific a tio n s fo r m o re d eta ils .
1. Ferrite bead is optional for input noise suppression
2. The I 2 C/SMBus requires pull-up resistors. Please refer to the I 2 C/SMBus specifications for more details.
s re q u ire a p u . a ill a r b a a th n p r to r T h e r e ta n c e v y as o th c p ci tiv lo μs o f u s n d o th u k
3 . T he D D C bu connected). s The 10 ll-u default sis value, assuming s is maximum w of 100 pF per device, n provides the necessary a 1 d ing pull-up rise b time. (a Please refer e to n the m b e r o f d e vi ce s
he 1 0k u lt lu d fa v a ,
c o n ne c te d) . T DDC Bus Ω section for more details. s um in g a m a x im um o f 1 0 0 pF pe r d e v ic e , p r ov id e s th e n e c e s s a ry 1μ s p u ll-u p ris e tim e. P le as e r efe r to th e D D C
B u s s e ctio n fo r m o r e in fo rm atio n.
FIGURE 2. 12V TO 1.8V/20A APPLICATION CIRCUIT (4.5V UVLO, 10ms SS DELAY, 5ms SS RAMP)
Typical Application Circuit
The following application circuit represents a typical
implementation of the ZL6100. For PMBus operation, it is
recommended to tie the enable pin (EN) to SGND.
ZL6100 Overview
Digital-DC Architecture
The ZL6100 is an innovative mixed-signal power conversion
and power management IC based on Zilker Labs patented
Digital-DC technology that provides an integrated, high
performance step-down converter for a wide variety of power
supply applications.
Today’s embedded power systems are typically designed for
optimal efficiency at maximum load, reducing the peak
thermal stress by limiting the total thermal dissipation inside
the system. Unfortunately, many of these systems are often
operated at load levels far below the peak where the power
system has been optimized, resulting in reduced efficiency.
While this may not cause thermal stress to occur, it does
contribute to higher electricity usage and results in higher
overall system operating costs.
Zilker Labs’ efficiency-adaptive ZL6100 DC/DC controller
helps mitigate this scenario by enabling the power converter
to automatically change their operating state to increase
efficiency and overall performance with little or no user
interaction needed.
Its unique PWM loop utilizes an ideal mix of analog and
digital blocks to enable precise control of the entire power
conversion process with no software required, resulting in a
very flexible device that is also very easy to use. An
8
extensive set of power management functions are fully
integrated and can be configured using simple pin
connections. The user configuration can be saved in an
internal non-volatile memory (NVM). Additionally, all
functions can be configured and monitored via the SMBus
hardware interface using standard PMBus commands,
allowing ultimate flexibility.
Once enabled, the ZL6100 is immediately ready to regulate
power and perform power management tasks with no
programming required. Advanced configuration options and
real-time configuration changes are available via the
I 2 C/SMBus interface if desired and continuous monitoring of
multiple operating parameters is possible with minimal
interaction from a host controller. Integrated sub-regulation
circuitry enables single supply operation from any supply
between 3V and 14V with no secondary bias supplies needed.
The ZL6100 can be configured by simply connecting its pins
according to Tables 1 and 2 provided on page 10 and
page 11. Additionally, a comprehensive set of online tools
and application notes are available to help simplify the
design process. An evaluation board is also available to help
the user become familiar with the device. This board can be
evaluated as a standalone platform using pin configuration
settings. A Windows?-based GUI is also provided to enable
full configuration and monitoring capability via the
I 2 C/SMBus interface using an available computer and the
included USB cable.
FN6876.3
August 29, 2012
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