参数资料
型号: ZY1120G-T3
厂商: Power-One
文件页数: 15/17页
文件大小: 0K
描述: PROGBL CONVERT DC-DC 20A OUT SMD
标准包装: 1
系列: No-Bus POL 转换器
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 3V
电压 - 输入(最大): 14V
Voltage - Output 1: 0.5 ~ 5.5 V
电流 - 输出(最大): 20A
电源(瓦) - 制造商系列: 110W
安装类型: 表面贴装
封装/外壳: 模块
尺寸/尺寸: 1.26" L x 0.39" W x 0.55" H(32.0mm x 10.0mm x 14.0mm)
包装: 标准包装
工作温度: -40°C ~ 85°C
电源(瓦特)- 最大: 110W
产品目录页面: 2739 (CN2011-ZH PDF)
其它名称: 179-2409-6
ZY1120 20A No-Bus POL Data Sheet
3V to 14V Input ? 0.5V to 5.5V Output
112.5 and 123.75 degrees, otherwise false PG and/or OV
indications may occur.
8.15 –VS and +VS
The differential voltage input of the POL converter
feedback loop.
During normal operation the resistors are removed
from the circuit by the switches. The “Margining
Down” switch is normally closed shorting the resistor
R DOWN while the “Margining Up” switch is normally
open disconnecting the resistor R UP .
9.
9.1
Application Information
Output Voltage Margining
An alternative configuration of the margining circuit is
shown in Figure 19. In the configuration both
switches are normally open that may be
Margining can be implemented either by changing
the trim voltage as described in the previous
advantageous in some implementations.
POL
paragraph or by changing the resistance between
the REF and TRIM pins.
Margining
Down Switch
(normally
closed)
Margining
Up Switch
(normally
open)
R UP
R TRIM
REF
POL
Margining
Up Switch
(normally
open)
R UP
R DOWN
R TRIM
REF
TRIM
Margining
Down Switch
(normally
open)
R DOWN
TRIM
PGND
PGND
Figure 18. Margining Configuration
Figure 19. Alternative Margining Configuration
R UP and R DOWN for this configuration are determined
from the following equations:
? ? ?
? ? , k ?
In the schematic shown in Figure 18, the nominal
output voltage is set with the trim resistor R TRIM
calculated from the equation in the paragraph 8.12.
R UP ?
20 ? R TRIM
20 ? R TRIM
? 5 ? R TRIM ? ? V % ?
? ? V % ?
? ?
? 100 ? ? V % ?
? V %
Resistors R UP and R DOWN are added to margin the
output voltage up and down respectively and
determined from the equations below.
R DOWN ?
20 ? R TRIM
20 ? R TRIM
? ?
? , k ?
? ??
?? , k ?
R UP ?
20 ? R TRIM
20 ? R TRIM
? 5 ? R TRIM ? ? V % ?
? ? V % ?
Caution :
Noise injected into the TRIM node may affect accuracy
of the output voltage and stability of the POL
converter. Always minimize the PCB trace length from
the TRIM pin to external components to avoid noise
R DOWN ? ? 20 ? R TRIM ? ? ?
? , k ?
?
?
? V % ?
100 ? ? V % ?
pickup.
Refer to No-Bus TM POL Converters. Z-1000 Series
Application Note on www.power-one.com for more
where R TRIM is the value of the trim resistor in k ? and
Δ V% is the absolute value of desired margining
expressed in percents of the nominal output voltage.
application information on this and other product
features.
ZD-00790 Rev. 1.6, 25-Jun-10
www.power-one.com
Page 15 of 17
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