参数资料
型号: ZY1120G-T3
厂商: Power-One
文件页数: 3/17页
文件大小: 0K
描述: PROGBL CONVERT DC-DC 20A OUT SMD
标准包装: 1
系列: No-Bus POL 转换器
类型: 非隔离(POL)
输出数: 1
电压 - 输入(最小): 3V
电压 - 输入(最大): 14V
Voltage - Output 1: 0.5 ~ 5.5 V
电流 - 输出(最大): 20A
电源(瓦) - 制造商系列: 110W
安装类型: 表面贴装
封装/外壳: 模块
尺寸/尺寸: 1.26" L x 0.39" W x 0.55" H(32.0mm x 10.0mm x 14.0mm)
包装: 标准包装
工作温度: -40°C ~ 85°C
电源(瓦特)- 最大: 110W
产品目录页面: 2739 (CN2011-ZH PDF)
其它名称: 179-2409-6
ZY1120 20A No-Bus POL Data Sheet
3V to 14V Input ? 0.5V to 5.5V Output
4.
Electrical Specifications
Specifications apply at the input voltage from 3V to 14V, output load from 0 to 20A, ambient temperature from -
40°C to 85°C, output capacitance consisting of 110 ? F ceramic and 220 ? F tantalum, and default performance
parameters settings unless otherwise noted.
4.1
Input Specifications
Parameter
Input voltage (V IN )
Input Current (at no load)
Undervoltage Lockout (VLDO
connected to VIN)
Undervoltage Lockout (VLDO
connected to V AUX =5V)
External Low Voltage Supply
VLDO Input Current
Conditions/Description
At V IN <4.75V, VLDO pin needs to be
connected to an external voltage source
higher than 4.75V
V IN ? 4.75V, VLDO pin connected to VIN
Ramping Up
Ramping Down
Ramping Up
Ramping Down
Connect to VLDO pin when V IN <4.75V
Current drawn from the external low
voltage supply at VLDO=5V
Min
3
4.75
Nom
50
4.00
3.9
2.8
2.7
50
Max
14
14
Units
VDC
mADC
VDC
VDC
VDC
VDC
VDC
mADC
4.2
Output Specifications
Parameter
Conditions/Description
Min
Nom
Max
Units
Output Current (I OUT )
V IN MIN to V IN MAX
-20
1
20
ADC
Programmable 2 with a resistor between
0.5
5.5
VDC
Output Voltage Range (V OUT )
Output Voltage Setpoint
Accuracy 3
Line Regulation 3
Load Regulation 3
Dynamic Regulation
Peak Deviation
Peak Deviation
Settling Time
Output Voltage Peak-to-Peak
Ripple and Noise
BW=20MHz
Full Load
Temperature Coefficient
TRIM and REF pins
Default (no resistor)
V IN =12V, I OUT =0.5*I OUT MAX , room
temperature
V IN MIN to V IN MAX
0 to I OUT MAX
Slew rate 1A/ ? s, 50% to 75% load step,
V IN ≥ 5V
V IN =3.3V
to 10% of peak deviation
V IN =5.0V, V OUT <2.5V
V IN =5.0V, V OUT ≥ 2.5V
V IN =12V, V OUT <2.5V
V IN =12V, V OUT ≥ 2.5V
V IN =12V, I OUT =0.5*I OUT MAX
0.5
±1.5% or 20mV whichever is
greater
±0.2
±0.2
100
150
25
15
25
20
35
70
VDC
%V OUT
%V OUT
%V OUT
mV
mV
? s
mV
mV
mV
mV
ppm/°C
Switching Frequency
450
500
550
kHz
1
At the negative output current (bus terminator mode) efficiency of the ZY1120 degrades resulting in increased internal power dissipation.
ZY1120 is a step-down converter, thus the output voltage is always lower than the input voltage as show in Figure 1.
Digital PWM has an inherent quantization uncertainty of ±6.25mV that is not included in the specified static regulation parameters.
Therefore maximum allowable negative current under specific conditions is 20% lower than the current determined from the derating curves
shown in paragraph 5.5.
2
3
ZD-00790 Rev. 1.6, 25-Jun-10
www.power-one.com
Page 3 of 17
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