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参数资料
| 型号： | ZY8110G |
| 厂商： | Power-One |
| 文件页数： | 14/28页 |
| 文件大小： | 0K |
| 描述： | PROGBL CONVERT DC-DC 10A OUT THR |
| 特色产品： | ZY Series Converters |
| 标准包装： | 48 |
| 系列： | 智能 POL 转换器 |
| 类型： | 非隔离（POL） |
| 输出数： | 1 |
| 电压 - 输入（最小）： | 8V |
| 电压 - 输入（最大）： | 14V |
| Voltage - Output 1： | 0.5 ~ 5.5 V |
| 电流 - 输出（最大）： | 10A |
| 电源（瓦） - 制造商系列： | 55W |
| 安装类型： | 通孔 |
| 封装/外壳： | 11-SIP 模块 |
| 尺寸/尺寸： | 1.20" L x 0.26" W x 0.84" H（30.5mm x 6.7mm x 21.4mm） |
| 包装： | 托盘 |
| 工作温度： | 0°C ~ 70°C |
| 效率： | 91.6% |
| 电源（瓦特）- 最大： | 55W |
| 产品目录页面： | 2739 (CN2011-ZH PDF) |
| 其它名称： | 179-2403 ZY8110G-R1 |
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ZY8110 10A DC-DC Intelligent POL
8V to 14V Input ? 0.5V to 5.5V Output
Data Sheet
8.1.1 Output Voltage Setpoint
The output voltage programming range is from 0.5V
V OUT
to 5.5V. To improve the resolution of the output
voltage settings, the voltage range is divided into
sub-ranges as shown in Table 2.
Upper Regulation
Limit
Operating
Point
VI Curve Without
Load Regulation
VI Curve With
Table 2. Output Voltage Adjustment Resolution
Lower Regulation
Load Regulation
V OUT MIN , V
0.500
V OUT MAX , V
2.000
Resolution, mV
12.5
Limit
Headroom without
Load Regulation
Headroom with
Load Regulation
2.025
5.25
25
Light
Load
I OUT
Heavy
Load
5.3
5.5
50
Figure 20. Concept of Optimal Voltage Positioning
8.1.2 Output Voltage Margining
If the output voltage needs to be varied by a certain
percentage, the margining function can be utilized.
The margining can be programmed in the GUI
Output Configuration window or directly via the I 2 C
bus using high level commands as described in the
‘”DPM Programming Manual”.
In order to properly margin POLs that are connected
in parallel, the POLs must be members of one of the
Parallel Buses. Refer to the GUI System
Configuration Window shown in Figure 44.
8.1.3 Optimal Voltage Positioning
Optimal voltage positioning increases the voltage
regulation window by properly positioning the output
voltage setpoint. Positioning is determined by the
load regulation that can be programmed in the GUI
Output Configuration window shown in Figure 18 or
directly via the I 2 C bus by writing into the CLS
register shown in Figure 29.
Figure 20 illustrates optimal voltage positioning
concept. If no load regulation is programmed, the
headroom (voltage differential between the output
voltage setpoint and a regulation limit) is
approximately half of the voltage regulation window.
When load regulation is programmed, the output
voltage will decrease as the output current
increases, so the VI characteristic will have a
negative slope. Therefore, by properly selecting the
operating point, it is possible to increase the
headroom as shown in the picture.
Increased headroom allows tolerating larger voltage
deviations. For example, the step load change from
light to heavy load will cause the output voltage to
drop. If the optimal voltage positioning is utilized, the
output voltage will stay within the regulation window.
Otherwise, the output voltage will drop below the
lower regulation limit. To compensate for the voltage
drop external output capacitance will need to be
added, thus increasing cost and complexity of the
system.
The effect of optimal voltage positioning is shown in
Figure 21 and Figure 22. In this case, switching
output load causes large peak-to-peak deviation of
the output voltage. By programming load regulation,
the peak to peak deviation is dramatically reduced.
Figure 21. Transient Response without Optimal Voltage
Positioning
ZD-01991 Rev. 1.1, 01-Jul-10
www.power-one.com
Page 14 of 28
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