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| 型号： | 11AA161T-I/TT |
| 厂商： | Microchip Technology |
| 文件页数： | 11/44页 |
| 文件大小： | 0K |
| 描述： | IC EEPROM 16K SER IND SOT23-3 |
| 标准包装： | 3,000 |
| 格式 - 存储器： | EEPROMs - 串行 |
| 存储器类型： | EEPROM |
| 存储容量： | 16K (2K x 8) |
| 速度： | 100kHz |
| 接口： | UNI/O?（单线） |
| 电源电压： | 1.8 V ~ 5.5 V |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | TO-236-3，SC-59，SOT-23-3 |
| 供应商设备封装： | SOT-23-3 |
| 包装： | 带卷 (TR) |
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11AAXXX/11LCXXX
4.2
Current Address Read ( CRRD)
Instruction
TABLE 4-2:
INTERNAL ADDRESS
COUNTER
The internal address counter featured on the 11XX
Command
Event
Action
maintains the address of the last memory array loca-
tion accessed. The CRRD instruction allows the mas-
ter to read data back beginning from this current
location. Consequently, no word address is provided
upon issuing this command.
Note that, except for the initial word address, the
READ and CRRD instructions are identical, including
the ability to continue requesting data through the use
—
READ or
WRITE
READ ,
WRITE , or
CRRD
Power-on Reset Counter is undefined
MAK edge fol- Counter is updated
lowing each with newly received
Address byte value
MAK/NoMAK Counter is incre-
edge following mented by 1
each data byte
of MAKs in order to sequentially read from the array.
As with the READ instruction, the CRRD instruction is
terminated by transmitting a NoMAK.
Table 4-2 lists the events upon which the internal
address counter is modified.
Note: If, following each data byte in a READ ,
WRITE , or CRRD instruction, neither a
MAK nor a NoMAK edge is received
(i.e., if a standby pulse occurs instead),
the internal address counter will not be
incremented.
Note: During a Write command, once the last
data byte for a page has been loaded,
the internal Address Pointer will rollover
to the beginning of the selected page.
FIGURE 4-2:
CRRD COMMAND SEQUENCE
SCIO
Standby Pulse
Start Header
Device Address
0 1 0 1 0 1 0 1
1 0 1 0 0 0 0
0 (1)
SCIO
SCIO
Command
0 0 0 0 0 1 1 0
Data Byte n
7 6 5 4 3 2 1 0
Data Byte 1
7 6 5 4 3 2 1 0
Data Byte 2
7 6 5 4 3 2 1 0
Note 1: For the 11XXXX1, this bit must be a ‘ 1 ’.
? 2010 Microchip Technology Inc.
Preliminary
DS22067H-page 11
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